summaryrefslogtreecommitdiff
path: root/lib
Commit message (Collapse)AuthorAge
* Use the simpler version of sys::fs::remove when possible.Rafael Espindola2014-01-10
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198958 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove remove_all. A compiler has no need for recursively deleting a directory.Rafael Espindola2014-01-10
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198955 91177308-0d34-0410-b5e6-96231b3b80d8
* LTO: whitespace changesDuncan P. N. Exon Smith2014-01-10
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198954 91177308-0d34-0410-b5e6-96231b3b80d8
* LoopVectorizer: Handle strided memory accesses by versioningArnold Schwaighofer2014-01-10
| | | | | | | | | | | | | | | for (i = 0; i < N; ++i) A[i * Stride1] += B[i * Stride2]; We take loops like this and check that the symbolic strides 'Strided1/2' are one and drop to the scalar loop if they are not. This is currently disabled by default and hidden behind the flag 'enable-mem-access-versioning'. radar://13075509 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198950 91177308-0d34-0410-b5e6-96231b3b80d8
* Must not produce Tag_CPU_arch_profile for pre-ARMv7 cores (e.g. cortex-m0)Artyom Skrobov2014-01-10
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198945 91177308-0d34-0410-b5e6-96231b3b80d8
* ARM: fix regression caused by r198914Saleem Abdulrasool2014-01-10
| | | | | | | | The disassembler would no longer be able to disambiguage between the two variants (explicit immediate #0 vs implicit, omitted #0) for the ldrt, strt, ldrbt, strbt mnemonics as both versions indicated the disassembler routine. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198944 91177308-0d34-0410-b5e6-96231b3b80d8
* Silence unused variable warning for non-asserting builds that was introduced ↵Kristof Beyls2014-01-10
| | | | | | in r198937. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198941 91177308-0d34-0410-b5e6-96231b3b80d8
* Use 'w' instead of 'c' to represent the win32 mangling.Rafael Espindola2014-01-10
| | | | | | | This change was requested to avoid confusion if we ever support non windows coff systems. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198938 91177308-0d34-0410-b5e6-96231b3b80d8
* Make sure -use-init-array has intended effect on all AArch64 ELF targets, ↵Kristof Beyls2014-01-10
| | | | | | not just linux. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198937 91177308-0d34-0410-b5e6-96231b3b80d8
* ARM IAS: support #:{lower,upper}16: for GNU compatibilitySaleem Abdulrasool2014-01-10
| | | | | | | | The GNU assembler supports prefixing the expression with a '#' to indiciate that the value that is being moved is infact a constant. This improves the compatibility of the integrated assembler's parser for this. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198916 91177308-0d34-0410-b5e6-96231b3b80d8
* ARM IAS: support GNU extension for ldrd, strdSaleem Abdulrasool2014-01-10
| | | | | | | | | The GNU assembler has an extension that allows for the elision of the paired register (dt2) for the LDRD and STRD mnemonics. Add support for this in the assembly parser. Canonicalise the usage during the instruction parsing from the specified version. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198915 91177308-0d34-0410-b5e6-96231b3b80d8
* ARM IAS: support implicit immediate 0s for {LD,ST}R{B,}TSaleem Abdulrasool2014-01-10
| | | | | | | | | | | | | | | | The ARM ARM indicates the mnemonics as follows: ldrbt{<c>}{<q>} <Rt>, [<Rn>], {, #+/-<imm>} ldrt{<c>}{<q>} <Rt>, [<Rn>] {, #+/-<imm>} strbt{<c>}{<q>} <Rt>, [<Rn>] {, #<imm>} strt{<c>}{<q>} <Rt>, [<Rn>] {, #+/-<imm>} This improves the parser to deal with the implicit immediate 0 for the mnemonics as per the specification. Thanks to Joerg Sonnenberger for the tests! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198914 91177308-0d34-0410-b5e6-96231b3b80d8
* [Sparc] Emit retl/ret instead of jmp instruction. It improves the ↵Venkatraman Govindaraju2014-01-10
| | | | | | readability of the assembly generated. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198910 91177308-0d34-0410-b5e6-96231b3b80d8
* [Sparc] Add support for parsing jmpl instruction and make indirect call and ↵Venkatraman Govindaraju2014-01-10
| | | | | | jmp instructions as aliases to jmpl. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198909 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert "Revert r198851, "Prototype of skeleton type units for fission""David Blaikie2014-01-10
| | | | | | | | | This reverts commit r198865 which reverts r198851. ASan identified a use-of-uninitialized of the DwarfTypeUnit::Ty variable in skeleton type units. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198908 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix a bug with the ARM thumb2 CBNZ and CBNZ instructions thatKevin Enderby2014-01-10
| | | | | | | | | | branch to the next instruction. This can not be encoded but can be turned into a NOP. rdar://15062072 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198904 91177308-0d34-0410-b5e6-96231b3b80d8
* [Sparc] Multiclass for loads/stores. No functionality change intended.Venkatraman Govindaraju2014-01-09
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198893 91177308-0d34-0410-b5e6-96231b3b80d8
* Clean up an inconsistency in v7s feature default.Evan Cheng2014-01-09
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198889 91177308-0d34-0410-b5e6-96231b3b80d8
* Re-remove dead code.Nadav Rotem2014-01-09
| | | | | | | | This reverts r198854. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198879 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert r198851, "Prototype of skeleton type units for fission"NAKAMURA Takumi2014-01-09
| | | | | | It caused undefined behavior. DwarfTypeUnit::Ty might not be initialized properly, I guess. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198865 91177308-0d34-0410-b5e6-96231b3b80d8
* Fixed old typo in ScalarEvolution, that caused wrong SCEVs zext operation.Stepan Dyatkovskiy2014-01-09
| | | | | | | | | | | Detailed description is here: http://llvm.org/bugs/show_bug.cgi?id=18000#c16 For participation in bugfix process special thanks to David Wiberg. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198863 91177308-0d34-0410-b5e6-96231b3b80d8
* [SystemZ] Fix RNSBG bug introduced by r197802Richard Sandiford2014-01-09
| | | | | | | | | The zext handling added in r197802 wasn't right for RNSBG. This patch restricts it to ROSBG, RXSBG and RISBG. (The tests for RISBG were added in r197802 since RISBG was the motivating example.) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198862 91177308-0d34-0410-b5e6-96231b3b80d8
* Handle masked rotate amountsRichard Sandiford2014-01-09
| | | | | | | | | | | | | | | At the moment we expect rotates to have the form: (or (shl X, Y), (shr X, Z)) where Y == bitsize(X) - Z or Z == bitsize(X) - Y. This form means that the (or ...) is undefined for Y == 0 or Z == 0. This undefinedness can be avoided by using Y == (C * bitsize(X) - Z) & (bitsize(X) - 1) or Z == (C * bitsize(X) - Y) & (bitsize(X) - 1) for any integer C (including 0, the most natural choice). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198861 91177308-0d34-0410-b5e6-96231b3b80d8
* Match the InstCombine form of rotates by X+CRichard Sandiford2014-01-09
| | | | | | | | | | | | | | | | | | InstCombine converts (sub 32, (add X, C)) into (sub 32-C, X), so a rotate left of a 32-bit Y by X+C could appear as either: (or (shl Y, (add X, C)), (shr Y, (sub 32, (add X, C)))) without InstCombine or: (or (shl Y, (add X, C)), (shr Y, (sub 32-C, X))) with it. We already matched the first form. This patch handles the second too. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198860 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert r198819 - "Remove dead code."Nadav Rotem2014-01-09
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198854 91177308-0d34-0410-b5e6-96231b3b80d8
* Prototype of skeleton type units for fissionDavid Blaikie2014-01-09
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198851 91177308-0d34-0410-b5e6-96231b3b80d8
* llvm-dwarfdump: type unit dwo supportDavid Blaikie2014-01-09
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198850 91177308-0d34-0410-b5e6-96231b3b80d8
* DwarfDebug: Refactor out common skeleton construction code to be reused for ↵David Blaikie2014-01-09
| | | | | | type unit skeletons. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198846 91177308-0d34-0410-b5e6-96231b3b80d8
* Reformatting for r198842David Blaikie2014-01-09
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198843 91177308-0d34-0410-b5e6-96231b3b80d8
* DwarfUnit: Rename "Node" to "CUNode" and propagate it through DwarfTypeUnit ↵David Blaikie2014-01-09
| | | | | | | | | | as well. Since we'll now also need the split dwarf file name along with the language in DwarfTypeUnits, just use the whole DICompileUnit rather than explicitly handling each field needed. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198842 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert "DwarfUnit: Move the DICompileUnit Node to the DwarfCompileUnit only"David Blaikie2014-01-09
| | | | | | | | This reverts commit r198830. Decided to go a different way with this... git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198841 91177308-0d34-0410-b5e6-96231b3b80d8
* [PM] Rename this source file to something a bit more generic beforeChandler Carruth2014-01-09
| | | | | | I add support for the new pass manager to it. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198838 91177308-0d34-0410-b5e6-96231b3b80d8
* Put the functionality for printing a value to a raw_ostream as anChandler Carruth2014-01-09
| | | | | | | | | | | | operand into the Value interface just like the core print method is. That gives a more conistent organization to the IR printing interfaces -- they are all attached to the IR objects themselves. Also, update all the users. This removes the 'Writer.h' header which contained only a single function declaration. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198836 91177308-0d34-0410-b5e6-96231b3b80d8
* DwarfUnit: Move the DICompileUnit Node to the DwarfCompileUnit onlyDavid Blaikie2014-01-09
| | | | | | It's unused in DwarfTypeUnit, as is expected. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198830 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove dead code.Rafael Espindola2014-01-09
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198819 91177308-0d34-0410-b5e6-96231b3b80d8
* llvm.experimental.stackmap: fix encoding of large constants.Andrew Trick2014-01-09
| | | | | | | | | | In the stackmap format we advertise the constant field as signed. However, we were determining whether to promote to a 64-bit constant pool based on an unsigned comparison. This fix allows -1 to be encoded as a small constant. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198816 91177308-0d34-0410-b5e6-96231b3b80d8
* Simplify/collapse/denest a conditions/blocks.David Blaikie2014-01-09
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198813 91177308-0d34-0410-b5e6-96231b3b80d8
* llvm-dwarfdump: reorder dwo sections to immediately proceed their non-dwo ↵David Blaikie2014-01-08
| | | | | | | | | equivalents This makes it easier to write a test that's mostly shared between fission and non-fission (using FileCheck's multiple prefix support). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198806 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove vestigal bits of MC from the mangler. It no longer uses this, andChandler Carruth2014-01-08
| | | | | | | having the include could cause weird layering problems between the IR and MC libraries. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198796 91177308-0d34-0410-b5e6-96231b3b80d8
* Conservatively handle multiple MMOs in MIsNeedChainEdgeHal Finkel2014-01-08
| | | | | | | | | | | | | | | | | | | | | | MIsNeedChainEdge, which is used by -enable-aa-sched-mi (AA in misched), had an llvm_unreachable when -enable-aa-sched-mi is enabled and we reach an instruction with multiple MMOs. Instead, return a conservative answer. This allows testing -enable-aa-sched-mi on x86. Also, this moves the check above the isUnsafeMemoryObject checks. isUnsafeMemoryObject is currently correct only for instructions with one MMO (as noted in the comment in isUnsafeMemoryObject): // We purposefully do no check for hasOneMemOperand() here // in hope to trigger an assert downstream in order to // finish implementation. The problem with this is that, had the candidate edge passed the "!MIa->mayStore() && !MIb->mayStore()" check, the hoped-for assert would never happen (which could, in theory, lead to incorrect behavior if one of these secondary MMOs was volatile, for example). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198795 91177308-0d34-0410-b5e6-96231b3b80d8
* Move declaration of variables down to first use.Matt Arsenault2014-01-08
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198794 91177308-0d34-0410-b5e6-96231b3b80d8
* [AArch64][NEON] Added UXTL and UXTL2 instruction aliasesAna Pazos2014-01-08
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198791 91177308-0d34-0410-b5e6-96231b3b80d8
* Force emit a relocation for @gnu_indirect_function symbols so that the indirectRoman Divacky2014-01-08
| | | | | | | resolution works. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198780 91177308-0d34-0410-b5e6-96231b3b80d8
* [x86] Remove OpSize16 flag from MOV32r0David Woodhouse2014-01-08
| | | | | | It's not a real instruction any more and doesn't need encoding information. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198778 91177308-0d34-0410-b5e6-96231b3b80d8
* Teach the DAGCombiner how to fold 'vselect' dag nodes accordingAndrea Di Biagio2014-01-08
| | | | | | | | | | to the following two rules: 1) fold (vselect (build_vector AllOnes), A, B) -> A 2) fold (vselect (build_vector AllZeros), A, B) -> B git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198777 91177308-0d34-0410-b5e6-96231b3b80d8
* [DAGCombiner] Factor duplicated rotate code into a separate functionRichard Sandiford2014-01-08
| | | | | | | No functional change intended. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198768 91177308-0d34-0410-b5e6-96231b3b80d8
* [x86] Support R_386_PC8, R_386_PC16 and R_X86_64_PC8David Woodhouse2014-01-08
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198763 91177308-0d34-0410-b5e6-96231b3b80d8
* [x86] Add JMP_2 and other 16-bit PC-relative branch instructionsDavid Woodhouse2014-01-08
| | | | | | | Mark them as requiring 16-bit mode for now, since we don't yet have relaxation support for FK_Data_2. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198762 91177308-0d34-0410-b5e6-96231b3b80d8
* [x86] Do not relax PUSHi16 to PUSHi32 (PR18414)David Woodhouse2014-01-08
| | | | | | | | They do *different* things to %esp, so they are not equivalent. Rename PUSHi8 to PUSH32i8 and add the missing PUSH16i8. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198761 91177308-0d34-0410-b5e6-96231b3b80d8
* [x86] Make AsmParser validate registers for memory operands a bit betterDavid Woodhouse2014-01-08
| | | | | | | | | | | | We can't do a perfect job here. We *have* to allow (%dx) even in 64-bit mode, for example, because it might be used for an unofficial form of the in/out instructions. We actually want to do a better job of validation *later*. Perhaps *instead* of doing it where we are at the moment. But for now, doing what validation we *can* do in the place that the code already has its validation, is an improvement. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198760 91177308-0d34-0410-b5e6-96231b3b80d8
generated by cgit v1.2.3 (git 2.25.1) at 2024-05-05 21:04:19 +0000