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* Canonicalize addrspacecast ConstExpr between different pointer typesJingyue Wu2014-06-15
| | | | | | | | | | | | | | | | | | | As a follow-up to r210375 which canonicalizes addrspacecast instructions, this patch canonicalizes addrspacecast constant expressions. Given clang uses ConstantExpr::getAddrSpaceCast to emit addrspacecast cosntant expressions, this patch is also a step towards having the frontend emit canonicalized addrspacecasts. Piggyback a minor refactor in InstCombineCasts.cpp Update three affected tests in addrspacecast-alias.ll, access-non-generic.ll and constant-fold-gep.ll and added one new test in constant-fold-address-space-pointer.ll git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211004 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix copy paste errorMatt Arsenault2014-06-15
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211003 91177308-0d34-0410-b5e6-96231b3b80d8
* R600: Remove a few more things from AMDILISelLoweringMatt Arsenault2014-06-15
| | | | | | | Try to keep all the setOperationActions for integer ops together. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211001 91177308-0d34-0410-b5e6-96231b3b80d8
* R600: Fix assert on vector sdivMatt Arsenault2014-06-15
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211000 91177308-0d34-0410-b5e6-96231b3b80d8
* R600: Move / cleanup more leftover AMDIL stuff.Matt Arsenault2014-06-15
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210998 91177308-0d34-0410-b5e6-96231b3b80d8
* R600: Move division custom lowering out of AMDILISelLoweringMatt Arsenault2014-06-15
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210997 91177308-0d34-0410-b5e6-96231b3b80d8
* Temporarily revert r210953 in an attempt to bring the ARM buildbotsEric Christopher2014-06-15
| | | | | | back. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210996 91177308-0d34-0410-b5e6-96231b3b80d8
* R600: Report that integer division is expensive.Matt Arsenault2014-06-15
| | | | | | Divides by weird constants now emit much better code. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210995 91177308-0d34-0410-b5e6-96231b3b80d8
* R600: Remove dead codeMatt Arsenault2014-06-15
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210994 91177308-0d34-0410-b5e6-96231b3b80d8
* PR20038: DebugInfo missing DIEs for some concrete variables.David Blaikie2014-06-15
| | | | | | | | I haven't nailed this down entirely, but this is about as small of a test case as I can seem to construct and adequately demonstrates the crasher. I'll continue investigating the root cause/fix(es). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210993 91177308-0d34-0410-b5e6-96231b3b80d8
* LegalizeDAG: make sure cast is unsigned before using FP_TO_UINT.Tim Northover2014-06-15
| | | | | | | | | | | | It's valid to use FP_TO_SINT when asking for a smaller type (e.g. all "unsigned int16" values fit into a "signed int32"), but the reverse isn't true. Unfortunately, I'm not actually aware of any architecture with asymmetric FP_TO_SINT and FP_TO_UINT handling and the logic happens to work in the symmetric case, so I can't actually write a test for this. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210986 91177308-0d34-0410-b5e6-96231b3b80d8
* AArch64: improve handling & modelling of FP_TO_XINT nodes.Tim Northover2014-06-15
| | | | | | | | There's probably no acatual change in behaviour here, just updating the LowerFP_TO_INT function to be more similar to the reverse implementation and updating costs to current CodeGen. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210985 91177308-0d34-0410-b5e6-96231b3b80d8
* AArch64: improve vector [su]itofp handling.Tim Northover2014-06-15
| | | | | | | This somehow got missed in the AArch64 merge, so should fix a performance regression since 3.4. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210984 91177308-0d34-0410-b5e6-96231b3b80d8
* Replacing the private implementations of SwapValue with calls to ↵Artyom Skrobov2014-06-14
| | | | | | sys::swapByteOrder() git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210980 91177308-0d34-0410-b5e6-96231b3b80d8
* Using llvm::sys::swapByteOrder() for the common case of byte-swapping a ↵Artyom Skrobov2014-06-14
| | | | | | value in place git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210978 91177308-0d34-0410-b5e6-96231b3b80d8
* Renaming SwapByteOrder() to getSwappedBytes()Artyom Skrobov2014-06-14
| | | | | | | | The next commit will add swapByteOrder(), acting in-place git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210973 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix typoMatt Arsenault2014-06-14
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210968 91177308-0d34-0410-b5e6-96231b3b80d8
* R600: Fix asserts related to constant initializersMatt Arsenault2014-06-14
| | | | | | | | | | | This would assert if a constant address space was extern and therefore didn't have an initializer. If the initializer was undef, it would hit the unreachable unhandled initializer case. An extern global should never really occur since we don't have machine linking, but bugpoint likes to remove initializers. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210967 91177308-0d34-0410-b5e6-96231b3b80d8
* R600: Use address space enum instead of valueMatt Arsenault2014-06-14
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210966 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove extra whitespace in function declaration. No functionality change.Nick Lewycky2014-06-14
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210965 91177308-0d34-0410-b5e6-96231b3b80d8
* DebugInfo: Remove some extra handling of abstract variables and instead rely ↵David Blaikie2014-06-13
| | | | | | | | | | | | | | | solely on the delayed handling introduced in r210946 Now that we handle finding abstract variables at the end of the module, remove the upfront handling and just ensure the abstract variable is built when necessary. In theory we could have a split implementation, where inlined variables are immediately constructed referencing the abstract definition, and concrete variables are delayed - but let's go with one solution for now unless there's a reason not to. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210961 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove InstrItineraryData off of the TargetMachine - it's alreadyEric Christopher2014-06-13
| | | | | | on the subtarget and just forward the accessor. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210955 91177308-0d34-0410-b5e6-96231b3b80d8
* Move ARMJITInfo off of the TargetMachine and down onto the subtarget.Eric Christopher2014-06-13
| | | | | | This required untangling a mess of headers that included around. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210953 91177308-0d34-0410-b5e6-96231b3b80d8
* Move GlobalMerge from Transform to CodeGen.Jiangning Liu2014-06-13
| | | | | | | | | | | This patch is to move GlobalMerge pass from Transform/Scalar to CodeGen, because GlobalMerge depends on TargetMachine. In the mean time, the macro INITIALIZE_TM_PASS is also moved to CodeGen/Passes.h. With this fix we can avoid making libScalarOpts depend on libCodeGen. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210951 91177308-0d34-0410-b5e6-96231b3b80d8
* The hazard recognizer only needs a subtarget, not a target machineEric Christopher2014-06-13
| | | | | | so make it take one. Fix up all users accordingly. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210948 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix typo.Eric Christopher2014-06-13
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210947 91177308-0d34-0410-b5e6-96231b3b80d8
* DebugInfo: Reference abstract definitions from variables in concrete ↵David Blaikie2014-06-13
| | | | | | | | | | | | definitions that preceed their first inline definition. Rather than relying on abstract variables looked up at the time the concrete variable is created, look them up at the end of the module to ensure they're referenced even if they're created after the concrete definition. This completes/matches the work done in r209677 to handle this for the subprograms themselves. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210946 91177308-0d34-0410-b5e6-96231b3b80d8
* [DWARF parser] Use distinction between DW_AT_ranges_base and ↵Alexey Samsonov2014-06-13
| | | | | | DW_AT_GNU_ranges_base instead of DWARF version git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210945 91177308-0d34-0410-b5e6-96231b3b80d8
* DwarfDebug::getExistingAbstractVariable: constify an existing reference ↵David Blaikie2014-06-13
| | | | | | parameter that didn't need to be mutated. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210944 91177308-0d34-0410-b5e6-96231b3b80d8
* DebugInfo: Following up to r209677, refactor local variable emission to ↵David Blaikie2014-06-13
| | | | | | | | | | | | | | | | delay the choice between emitting the definition attributes or using DW_AT_abstract_definition This doesn't fix the abstract variable handling yet, but it introduces a similar delay mechanism as was added for subprograms, causing DW_AT_location to be reordered to the beginning of the attribute list for local variables, and fixes all the test fallout for that. A subsequent commit will remove the abstract variable handling in DbgVariable and just do the abstract variable lookup at module end to ensure that abstract variables introduced after their concrete counterparts are appropriately referenced by the concrete variable. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210943 91177308-0d34-0410-b5e6-96231b3b80d8
* Make the error-handling functions thread-safe.Zachary Turner2014-06-13
| | | | | | | | | | | | | Prior to this change, error handling functions must be installed and removed only inside of an llvm_[start/stop]_multithreading pair. This change allows error handling functions to be installed any time, and from any thread. Reviewed by: chandlerc Differential Revision: http://reviews.llvm.org/D4140 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210937 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove top-level Clang -fsanitize= flags for optional ASan features.Alexey Samsonov2014-06-13
| | | | | | | | | | | | | | Init-order and use-after-return modes can currently be enabled by runtime flags. use-after-scope mode is not really working at the moment. The only problem I see is that users won't be able to disable extra instrumentation for init-order and use-after-scope by a top-level Clang flag. But this instrumentation was implicitly enabled for quite a while and we didn't hear from users hurt by it. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210924 91177308-0d34-0410-b5e6-96231b3b80d8
* X86: lower ATOMIC_CMP_SWAP_WITH_SUCCESS directlyTim Northover2014-06-13
| | | | | | | | | | | Lowering this new node allows us to fold the almost universal comparison for success before it's even formed. Instead we can create a copy from EFLAGS and an X86ISD::SETCC operation since all "cmpxchg" instructions set the zero-flag to the correct value. rdar://problem/13201607 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210923 91177308-0d34-0410-b5e6-96231b3b80d8
* R600: Cleanup some old AMDIL stuff.Matt Arsenault2014-06-13
| | | | | | | | | | | | Move / delete some of the more obviously wrong setOperationAction calls. Most of these are setting Expand for types that aren't legal which is the default anyway. Leave stuff that might require more thought on whether it's junk or not as it is. No functionality change. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210922 91177308-0d34-0410-b5e6-96231b3b80d8
* Finishing touch for the std::error_code transition.Rafael Espindola2014-06-13
| | | | | | | | | | | While std::error_code itself seems to work OK in all platforms, there are few annoying differences with regards to the std::errc enumeration. This patch adds a simple llvm enumeration, which will hopefully avoid build breakages in other platforms and surprises as we get more uses of std::error_code. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210920 91177308-0d34-0410-b5e6-96231b3b80d8
* Atomics: make use of the "cmpxchg weak" instruction.Tim Northover2014-06-13
| | | | | | | | | This also simplifies the IR we create slightly: instead of working out where success & failure should go manually, it turns out we can just always jump to a success/failure block created for the purpose. Later phases will sort out the mess without much difficulty. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210917 91177308-0d34-0410-b5e6-96231b3b80d8
* Atomics: switch direction of cmpxchg comparisonTim Northover2014-06-13
| | | | | | | | This has two benefits: it makes the result more suitable for direct insertaion into the struct to emulate the new cmpxchg, and it means the name we give the instruction matches its actual effect better. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210916 91177308-0d34-0410-b5e6-96231b3b80d8
* R600: Remove AMDIL instruction and register definitionsTom Stellard2014-06-13
| | | | | | Most of these are no longer used any more. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210915 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove unused and odd code.Rafael Espindola2014-06-13
| | | | | | | | This code was never being used and any use of it would look fairly strange. For example, it would try to map a object_error::parse_failed to std::errc::invalid_argument. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210912 91177308-0d34-0410-b5e6-96231b3b80d8
* SCCP: update for cmpxchg returning { iN, i1 } now.Tim Northover2014-06-13
| | | | | | I accidentally missed this one since its use looked OK locally. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210909 91177308-0d34-0410-b5e6-96231b3b80d8
* [mips][mips64r6] Relocation R_MIPS_PC18_S3Zoran Jovanovic2014-06-13
| | | | | | | Differential Revision: http://reviews.llvm.org/D3890 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210908 91177308-0d34-0410-b5e6-96231b3b80d8
* IR: add "cmpxchg weak" variant to support permitted failure.Tim Northover2014-06-13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This commit adds a weak variant of the cmpxchg operation, as described in C++11. A cmpxchg instruction with this modifier is permitted to fail to store, even if the comparison indicated it should. As a result, cmpxchg instructions must return a flag indicating success in addition to their original iN value loaded. Thus, for uniformity *all* cmpxchg instructions now return "{ iN, i1 }". The second flag is 1 when the store succeeded. At the DAG level, a new ATOMIC_CMP_SWAP_WITH_SUCCESS node has been added as the natural representation for the new cmpxchg instructions. It is a strong cmpxchg. By default this gets Expanded to the existing ATOMIC_CMP_SWAP during Legalization, so existing backends should see no change in behaviour. If they wish to deal with the enhanced node instead, they can call setOperationAction on it. Beware: as a node with 2 results, it cannot be selected from TableGen. Currently, no use is made of the extra information provided in this patch. Test updates are almost entirely adapting the input IR to the new scheme. Summary for out of tree users: ------------------------------ + Legacy Bitcode files are upgraded during read. + Legacy assembly IR files will be invalid. + Front-ends must adapt to different type for "cmpxchg". + Backends should be unaffected by default. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210903 91177308-0d34-0410-b5e6-96231b3b80d8
* [mips] Add cache and pref instructionsDaniel Sanders2014-06-13
| | | | | | | | | | | | | | | | | | | Summary: cache and pref were added in MIPS-III, and MIPS32 but were re-encoded in MIPS32r6/MIPS64r6 to use a 9-bit offset rather than the 16-bit offset available to earlier cores. Resolved the decoding conflict between pref and lwc3. Depends on D4115 Reviewers: zoran.jovanovic, jkolek, vmedic Reviewed By: vmedic Differential Revision: http://reviews.llvm.org/D4116 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210900 91177308-0d34-0410-b5e6-96231b3b80d8
* [mips][mips64r6] bc1any[24] are not available on MIPS32r6/MIPS64r6Daniel Sanders2014-06-13
| | | | | | | | | | | | | | Summary: These MIPS-3D instructions have never been implemented in LLVM so we only add testcases. Reviewers: zoran.jovanovic, jkolek, vmedic Reviewed By: vmedic Differential Revision: http://reviews.llvm.org/D4115 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210899 91177308-0d34-0410-b5e6-96231b3b80d8
* [mips][mips64r6] b(ge|lt)zal are not available on MIPS32r6/MIPS64r6 and bal ↵Daniel Sanders2014-06-13
| | | | | | | | | | | | | | | | | | | | | | | | | | is a normal instruction Summary: b(ge|lt)zal have been removed in MIPS32r6/MIPS64r6. However, bal (an alias for 'bgezal $zero, $offset') still remains with the same encoding it had prior to MIPS32r6/MIPS64r6. Updated the MipsNaCLELFStreamer, and MipsLongBranch to correctly handle the MIPS32r6/MIPS64r6 BAL instruction in addition to the existing BAL_BR pseudo. No changes were required to the CodeGen test that looks for BAL (test/CodeGen/Mips/longbranch.ll) since the new instruction has the same syntax. Depends on D4113 Reviewers: jkolek, zoran.jovanovic, vmedic Reviewed By: vmedic Differential Revision: http://reviews.llvm.org/D4114 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210898 91177308-0d34-0410-b5e6-96231b3b80d8
* [mips][mips64r6] daddi is not available on MIPS64r6Daniel Sanders2014-06-13
| | | | | | | | | | | | | | | | | | Summary: It's not emitted by the code generator so we only need assembler tests. Also added missing daddi aliases from dsub mnemonics, and removed a couple duplicate dsub tests. Depends on D4112 Reviewers: zoran.jovanovic, jkolek, vmedic Reviewed By: vmedic Differential Revision: http://reviews.llvm.org/D4113 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210897 91177308-0d34-0410-b5e6-96231b3b80d8
* Add HasCDI predicate to AVX512 VPBROADCASTM*.Cameron McInally2014-06-13
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210892 91177308-0d34-0410-b5e6-96231b3b80d8
* CPP backend: set volatile property on atomic instructions.Tim Northover2014-06-13
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210890 91177308-0d34-0410-b5e6-96231b3b80d8
* ARM: Fix fastcc calling convention for Thumb1Oliver Stannard2014-06-13
| | | | | | | | | | When targetting Thumb1 on a processor which has a VFP unit (which is not accessible from Thumb1), we were converting the fastcc calling convention to AAPCS-VFP, which is not possible. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210889 91177308-0d34-0410-b5e6-96231b3b80d8
* R600: Don't call setOperationAction with things that aren't opcodes.Matt Arsenault2014-06-13
| | | | | | | | | CondCode actions are set with setCondCodeAction. This should have been a harmless bug since the values seem to only collide only with nodes that don't need to be handled, and these are already correctly setup elsewhere. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210888 91177308-0d34-0410-b5e6-96231b3b80d8
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