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* Merging r201841:Tom Stellard2014-04-09
| | | | | | | | | | | ------------------------------------------------------------------------ r201841 | Kevin.Qin | 2014-02-21 02:45:48 -0500 (Fri, 21 Feb 2014) | 2 lines [AArch64] Add register constraints to avoid generating STLXR and STXR with unpredictable behavior. ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@205903 91177308-0d34-0410-b5e6-96231b3b80d8
* Merging r201541:Tom Stellard2014-04-09
| | | | | | | | | | | ------------------------------------------------------------------------ r201541 | jiangning.liu | 2014-02-17 21:37:42 -0500 (Mon, 17 Feb 2014) | 2 lines Fix a typo about lowering AArch64 va_copy. ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@205902 91177308-0d34-0410-b5e6-96231b3b80d8
* Merging r196806:Bill Wendling2013-12-10
| | | | | | | | | | | | | | | | | | | | | ------------------------------------------------------------------------ r196806 | apazos | 2013-12-09 11:29:14 -0800 (Mon, 09 Dec 2013) | 11 lines Fix pattern match for movi with 0D result Patch by Jiangning Liu. With some test case changes: - intrinsic test added to the existing /test/CodeGen/AArch64/neon-aba-abd.ll. - New test cases to cover movi 1D scenario without using the intrinsic in test/CodeGen/AArch64/neon-mov.ll. ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@196872 91177308-0d34-0410-b5e6-96231b3b80d8
* Merge rest of r196210. Some bits strayed into r196701, turning 3.4 red. ThisTim Northover2013-12-09
| | | | | | | | | | | | | | should fix the issue. ------------------------------------------------------------------------ r196210 | haoliu | 2013-12-03 06:06:55 +0000 (Tue, 03 Dec 2013) | 3 lines [AArch64]Add missing floating point convert, round and misc intrinsics. E.g. int64x1_t vcvt_s64_f64(float64x1_t a) -> FCVTZS Dd, Dn ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@196772 91177308-0d34-0410-b5e6-96231b3b80d8
* Merging r196456:Bill Wendling2013-12-08
| | | | | | | | | | | | ------------------------------------------------------------------------ r196456 | jiangning | 2013-12-04 18:12:01 -0800 (Wed, 04 Dec 2013) | 2 lines For AArch64, add missing register cost calculation for big value types like v4i64 and v8i64. ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@196700 91177308-0d34-0410-b5e6-96231b3b80d8
* Merging r196362:Bill Wendling2013-12-08
| | | | | | | | | | | ------------------------------------------------------------------------ r196362 | kevinqin | 2013-12-04 00:02:34 -0800 (Wed, 04 Dec 2013) | 1 line [AArch64 Neon] Add ACLE intrinsic vceqz_f64. ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@196699 91177308-0d34-0410-b5e6-96231b3b80d8
* Merging r196360:Bill Wendling2013-12-08
| | | | | | | | | | | ------------------------------------------------------------------------ r196360 | kevinqin | 2013-12-03 23:53:28 -0800 (Tue, 03 Dec 2013) | 1 line [AArch64 NEON] Add missing compare intrinsics. ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@196697 91177308-0d34-0410-b5e6-96231b3b80d8
* Merging r196208:Bill Wendling2013-12-08
| | | | | | | | | | | | | ------------------------------------------------------------------------ r196208 | haoliu | 2013-12-02 21:58:30 -0800 (Mon, 02 Dec 2013) | 3 lines AArch64: add missing ACLE intrinsics mapping to general arithmetic operation from VFP instructions. E.g. float64x1_t vadd_f64(float64x1_t a, float64x1_t b) -> FADD Dd, Dn, Dm. ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@196693 91177308-0d34-0410-b5e6-96231b3b80d8
* Merging r196198:Bill Wendling2013-12-08
| | | | | | | | | | | | | ------------------------------------------------------------------------ r196198 | haoliu | 2013-12-02 19:39:47 -0800 (Mon, 02 Dec 2013) | 3 lines AArch64: Add missing scalar pair intrinsics. E.g. "float32_t vaddv_f32(float32x2_t a)" to be matched into "faddp s0, v1.2s". ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@196691 91177308-0d34-0410-b5e6-96231b3b80d8
* Merging r196192:Bill Wendling2013-12-08
| | | | | | | | | | | | ------------------------------------------------------------------------ r196192 | jiangning | 2013-12-02 17:33:52 -0800 (Mon, 02 Dec 2013) | 2 lines Add some missing pattern matches for AArch64 Neon intrinsics like vuqadd_s64 and friends. ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@196690 91177308-0d34-0410-b5e6-96231b3b80d8
* Merging r196190:Bill Wendling2013-12-08
| | | | | | | | | | | | ------------------------------------------------------------------------ r196190 | jiangning | 2013-12-02 17:29:32 -0800 (Mon, 02 Dec 2013) | 2 lines Add some missing pattern matches for AArch64 Neon intrinsics like vmull_high_n_s16 and friends. ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@196688 91177308-0d34-0410-b5e6-96231b3b80d8
* Merging r196151:Bill Wendling2013-12-03
| | | | | | | | | | | | ------------------------------------------------------------------------ r196151 | mcrosier | 2013-12-02 13:05:16 -0800 (Mon, 02 Dec 2013) | 2 lines [AArch64] Implemented vcopy_lane patterns using scalar DUP instruction. Patch by Ana Pazos! ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@196230 91177308-0d34-0410-b5e6-96231b3b80d8
* Merging r195941:Bill Wendling2013-12-01
| | | | | | | | | | | | | | ------------------------------------------------------------------------ r195941 | haoliu | 2013-11-28 18:11:22 -0800 (Thu, 28 Nov 2013) | 4 lines AArch64: The pattern match should check the range of the immediate value. Or we can generate some illegal instructions. E.g. shrn2 v0.4s, v1.2d, #35. The legal range should be in [1, 16]. ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@196033 91177308-0d34-0410-b5e6-96231b3b80d8
* Merging r195939:Bill Wendling2013-12-01
| | | | | | | | | | | | ------------------------------------------------------------------------ r195939 | jiangning | 2013-11-28 17:38:08 -0800 (Thu, 28 Nov 2013) | 2 lines Add missing test case for bsl_f64 support of AArch64 NEON. ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@196031 91177308-0d34-0410-b5e6-96231b3b80d8
* Merging r195843:Bill Wendling2013-12-01
| | | | | | | | | | | | ------------------------------------------------------------------------ r195843 | jiangning | 2013-11-27 06:02:25 -0800 (Wed, 27 Nov 2013) | 2 lines Fix the AArch64 NEON bug exposed by checking constant integer argument range of ACLE intrinsics. ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@195997 91177308-0d34-0410-b5e6-96231b3b80d8
* Merging r195803:Bill Wendling2013-12-01
| | | | | | | | | | | ------------------------------------------------------------------------ r195803 | mcrosier | 2013-11-26 17:45:58 -0800 (Tue, 26 Nov 2013) | 1 line [AArch64] Add support for NEON scalar floating-point absolute difference. ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@195994 91177308-0d34-0410-b5e6-96231b3b80d8
* Merging r195788:Bill Wendling2013-12-01
| | | | | | | | | | | | ------------------------------------------------------------------------ r195788 | mcrosier | 2013-11-26 14:17:37 -0800 (Tue, 26 Nov 2013) | 2 lines [AArch64] Add support for NEON scalar floating-point to integer convert instructions. ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@195993 91177308-0d34-0410-b5e6-96231b3b80d8
* Merging r195424:Bill Wendling2013-11-26
| | | | | | | | | | | | | | ------------------------------------------------------------------------ r195424 | haoliu | 2013-11-22 00:47:22 -0800 (Fri, 22 Nov 2013) | 4 lines Fix the bugs about AArch64 Load/Store vector types and bitcast between i64 and vector types. e.g. "%tmp = load <2 x i64>* %ptr" can't be selected. "%tmp = bitcast i64 %in to <2 x i32>" can't be selected. ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@195764 91177308-0d34-0410-b5e6-96231b3b80d8
* Merging r195408:Bill Wendling2013-11-26
| | | | | | | | | | | | ------------------------------------------------------------------------ r195408 | jiangning | 2013-11-21 18:45:13 -0800 (Thu, 21 Nov 2013) | 2 lines For AArch64 back-end instruction selection, lower Neon_Lowxxx with EXTRCT_SUBREG. ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@195762 91177308-0d34-0410-b5e6-96231b3b80d8
* Merging r195713:Bill Wendling2013-11-26
| | | | | | | | | | | ------------------------------------------------------------------------ r195713 | kevinqin | 2013-11-25 18:33:42 -0800 (Mon, 25 Nov 2013) | 1 line [AArch64]Implement 128 bit register copy with NEON. ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@195758 91177308-0d34-0410-b5e6-96231b3b80d8
* Merging r195716:Bill Wendling2013-11-26
| | | | | | | | | | | | | ------------------------------------------------------------------------ r195716 | kevinqin | 2013-11-25 19:26:47 -0800 (Mon, 25 Nov 2013) | 3 lines Refactored the implementation of AArch64 NEON instruction ZIP, UZP and TRN. Fix a bug when mixed use of vget_high_u8() and vuzp_u8(). ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@195735 91177308-0d34-0410-b5e6-96231b3b80d8
* Merging r195330:Bill Wendling2013-11-25
| | | | | | | | | | | | | | | ------------------------------------------------------------------------ r195330 | apazos | 2013-11-21 00:16:15 -0800 (Thu, 21 Nov 2013) | 5 lines Implemented Neon scalar vdup_lane intrinsics. Fixed scalar dup alias and added test case. ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@195612 91177308-0d34-0410-b5e6-96231b3b80d8
* Merging r195327:Bill Wendling2013-11-25
| | | | | | | | | | | | | | | | ------------------------------------------------------------------------ r195327 | apazos | 2013-11-20 23:37:04 -0800 (Wed, 20 Nov 2013) | 6 lines Implemented Neon scalar by element intrinsics. Intrinsics implemented: vqdmull_lane, vqdmulh_lane, vqrdmulh_lane, vqdmlal_lane, vqdmlsl_lane scalar Neon intrinsics. ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@195611 91177308-0d34-0410-b5e6-96231b3b80d8
* Implement AArch64 neon instructions class SIMD lsone and SIMD lone-post.Hao Liu2013-11-19
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195078 91177308-0d34-0410-b5e6-96231b3b80d8
* Implement AArch64 SISD intrinsics for vget_high and vget_low.Jiangning Liu2013-11-19
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195074 91177308-0d34-0410-b5e6-96231b3b80d8
* Add predicate for AArch64 crypto instructions.Jiangning Liu2013-11-19
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195071 91177308-0d34-0410-b5e6-96231b3b80d8
* Implement the newly added ACLE functions for ld1/st1 with 2/3/4 vectors.Hao Liu2013-11-18
| | | | | | | The functions are like: vst1_s8_x2 ... git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194990 91177308-0d34-0410-b5e6-96231b3b80d8
* Implemented aarch64 Neon scalar vmulx_lane intrinsicsAna Pazos2013-11-15
| | | | | | | | | | | | | | | | Implemented aarch64 Neon scalar vfma_lane intrinsics Implemented aarch64 Neon scalar vfms_lane intrinsics Implemented legacy vmul_n_f64, vmul_lane_f64, vmul_laneq_f64 intrinsics (v1f64 parameter type) using Neon scalar instructions. Implemented legacy vfma_lane_f64, vfms_lane_f64, vfma_laneq_f64, vfms_laneq_f64 intrinsics (v1f64 parameter type) using Neon scalar instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194888 91177308-0d34-0410-b5e6-96231b3b80d8
* [AArch64] Fix the scalar NEON ACLE functions so that they return float/doubleChad Rosier2013-11-15
| | | | | | rather than the vector equivalent. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194853 91177308-0d34-0410-b5e6-96231b3b80d8
* Add test case for AArch64 NEON instruction set misc.Kevin Qin2013-11-14
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194673 91177308-0d34-0410-b5e6-96231b3b80d8
* Implement aarch64 neon instruction class SIMD misc.Kevin Qin2013-11-14
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194656 91177308-0d34-0410-b5e6-96231b3b80d8
* Implement AArch64 NEON instruction set AdvSIMD (table).Jiangning Liu2013-11-14
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194648 91177308-0d34-0410-b5e6-96231b3b80d8
* [AArch64] Add support for legacy AArch32 NEON scalar shift by immediateChad Rosier2013-11-13
| | | | | | | | instructions. This patch does not include the shift right and accumulate instructions. A number of non-overloaded intrinsics have been remove in favor of their overloaded counterparts. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194598 91177308-0d34-0410-b5e6-96231b3b80d8
* [AArch64] The shift right/left and insert immediate builtins expect 3Chad Rosier2013-11-11
| | | | | | source operands, a vector, an element to insert, and a shift amount. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194406 91177308-0d34-0410-b5e6-96231b3b80d8
* [AArch64] Add support for NEON scalar floating-point convert to fixed-point ↵Chad Rosier2013-11-11
| | | | | | instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194394 91177308-0d34-0410-b5e6-96231b3b80d8
* Implement AArch64 Neon instruction set Perm.Jiangning Liu2013-11-06
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194123 91177308-0d34-0410-b5e6-96231b3b80d8
* Implement AArch64 Neon instruction set Bitwise Extract.Jiangning Liu2013-11-06
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194118 91177308-0d34-0410-b5e6-96231b3b80d8
* Implement AArch64 Neon Crypto instruction classes AES, SHA, and 3 SHA.Jiangning Liu2013-11-05
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194085 91177308-0d34-0410-b5e6-96231b3b80d8
* Implement AArch64 post-index vector load/store multiple N-element structure ↵Hao Liu2013-11-05
| | | | | | | | | | | | | class SIMD(lselem-post). Including following 14 instructions: 4 ld1 insts: post-index load multiple 1-element structure to sequential 1/2/3/4 registers. ld2/ld3/ld4: post-index load multiple N-element structure to sequential N registers (N=2,3,4). 4 st1 insts: post-index store multiple 1-element structure from sequential 1/2/3/4 registers. st2/st3/st4: post-index store multiple N-element structure from sequential N registers (N = 2,3,4). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194043 91177308-0d34-0410-b5e6-96231b3b80d8
* Implemented aarch64 neon intrinsic vcopy_lane with float type.Kevin Qin2013-11-05
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194041 91177308-0d34-0410-b5e6-96231b3b80d8
* AArch64: use default asm operand printing when modifier inapplicableTim Northover2013-11-04
| | | | | | | | | | | | If an inline assembly operand has multiple constraints (e.g. "Ir" for immediate or register) and an operand modifier (E.g. "w" for "print register as wN") then we need to decide behaviour when the modifier doesn't apply to the constraint. Previousely produced some combination of an assertion failure and a fatal error. GCC's behaviour appears to be to ignore the modifier and print the operand in the default way. This patch should implement that. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194024 91177308-0d34-0410-b5e6-96231b3b80d8
* [AArch64] Add support for NEON scalar fixed-point convert to floating-point ↵Chad Rosier2013-10-31
| | | | | | instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193816 91177308-0d34-0410-b5e6-96231b3b80d8
* [AArch64] Add support for NEON scalar shift immediate instructions.Chad Rosier2013-10-31
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193790 91177308-0d34-0410-b5e6-96231b3b80d8
* [AArch64] Make the use of FP instructions optional, but enabled by default.Amara Emerson2013-10-31
| | | | | | | | This adds a new subtarget feature called FPARMv8 (implied by NEON), and predicates the support of the FP instructions and registers on this feature. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193739 91177308-0d34-0410-b5e6-96231b3b80d8
* [AArch64] Add support for NEON scalar floating-point compare instructions.Chad Rosier2013-10-30
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193691 91177308-0d34-0410-b5e6-96231b3b80d8
* add test cases for frameaddr and returnaddr for aarch64Weiming Zhao2013-10-29
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193626 91177308-0d34-0410-b5e6-96231b3b80d8
* AArch64: add 'a' inline asm operand modifierTim Northover2013-10-29
| | | | | | | This is used in the Linux kernel, and effectively just means "print an address". git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193593 91177308-0d34-0410-b5e6-96231b3b80d8
* Convert another llc -filetype=obj test.Rafael Espindola2013-10-28
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193538 91177308-0d34-0410-b5e6-96231b3b80d8
* Convert another llc -filetype=obj test.Rafael Espindola2013-10-28
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193537 91177308-0d34-0410-b5e6-96231b3b80d8
* Convert another llc -filetype=obj test.Rafael Espindola2013-10-28
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193536 91177308-0d34-0410-b5e6-96231b3b80d8
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