| Commit message (Collapse) | Author | Age | |
|---|---|---|---|
| * | Remove arm_apcscc from the test files. It is the default and doing this | Rafael Espindola | 2010-06-17 |
| | | | | | | | matches what llvm-gcc and clang now produce. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106221 91177308-0d34-0410-b5e6-96231b3b80d8 | ||
| * | Eliminate more uses of llvm-as and llvm-dis. | Dan Gohman | 2009-09-09 |
| | | | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81293 91177308-0d34-0410-b5e6-96231b3b80d8 | ||
| * | Add a bit IsUndef to MachineOperand. This indicates the def / use register ↵ | Evan Cheng | 2009-06-30 |
| operand is defined by an implicit_def. That means it can def / use any register and passes (e.g. register scavenger) can feel free to ignore them. The register allocator, when it allocates a register to a virtual register defined by an implicit_def, can allocate any physical register without worrying about overlapping live ranges. It should mark all of operands of the said virtual register so later passes will do the right thing. This is not the best solution. But it should be a lot less fragile to having the scavenger try to track what is defined by implicit_def. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74518 91177308-0d34-0410-b5e6-96231b3b80d8 | |||
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