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	Commit message (Collapse)	Author	Age
*	Mass update to CodeGen tests to use CHECK-LABEL for labels corresponding to ↵	Stephen Lin	2013-07-14
\| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \|	function definitions for more informative error messages. No functionality change and all updated tests passed locally. This update was done with the following bash script: find test/CodeGen -name ".ll" \| \ while read NAME; do echo "$NAME" if ! grep -q "^; RUN: llc.debug" $NAME; then TEMP=`mktemp -t temp` cp $NAME $TEMP sed -n "s/^define [^@]@$[A-Za-z0-9_]$(.$/\1/p" < $NAME \| \ while read FUNC; do sed -i '' "s/;$.$$[A-Za-z0-9_-]$:$ $$FUNC: \$/;\1\2-LABEL:\3$FUNC:/g" $TEMP done sed -i '' "s/;$.$-LABEL-LABEL:/;\1-LABEL:/" $TEMP sed -i '' "s/;$.$-NEXT-LABEL:/;\1-NEXT:/" $TEMP sed -i '' "s/;$.$-NOT-LABEL:/;\1-NOT:/" $TEMP sed -i '' "s/;$.*$-DAG-LABEL:/;\1-DAG:/" $TEMP mv $TEMP $NAME fi done git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186280 91177308-0d34-0410-b5e6-96231b3b80d8
*	Change some ARM subtarget features to be single bit yes/no in order to sink ↵	Evan Cheng	2011-07-07
\| \| \| \| \| \|	them down to MC layer. Also fix tests. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134590 91177308-0d34-0410-b5e6-96231b3b80d8
*	Since ARM's prefetch implementation predicted the presence of a instruction	Bruno Cardoso Lopes	2011-06-14
\| \| \| \| \| \| \|	cache prefetch and now that the info from "prefetch" to "ARMPreload" is present, only add a testcase for PLI. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132978 91177308-0d34-0410-b5e6-96231b3b80d8
*	Add one more argument to the prefetch intrinsic to indicate whether it's a data	Bruno Cardoso Lopes	2011-06-14
\| \| \| \| \| \| \|	or instruction cache access. Update the targets to match it and also teach autoupgrade. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132976 91177308-0d34-0410-b5e6-96231b3b80d8
*	Add -mcpu=cortex-a9-mp. It's cortex-a9 with MP extension. rdar://8648637.	Bob Wilson	2011-04-19
\| \| \| \|	git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129774 91177308-0d34-0410-b5e6-96231b3b80d8
*	Fix @llvm.prefetch isel. Selecting between pld / pldw using the first ↵	Evan Cheng	2010-11-04
\| \| \| \| \| \|	immediate rw. There is currently no intrinsic that matches to pli. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118237 91177308-0d34-0410-b5e6-96231b3b80d8
*	Fix preload instruction isel. Only v7 supports pli, and only v7 with mp ↵	Evan Cheng	2010-11-03
\| \| \| \| \| \|	extension supports pldw. Add subtarget attribute to denote mp extension support and legalize illegal ones to nothing. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118160 91177308-0d34-0410-b5e6-96231b3b80d8
*	Add support to match @llvm.prefetch to pld / pldw / pli. rdar://8601536.	Evan Cheng	2010-11-03
	git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118152 91177308-0d34-0410-b5e6-96231b3b80d8