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path: root/test/CodeGen/ARM/select.ll
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* Revert "Tests: Be less dependent on a specific schedule/regalloc"Matthias Braun2013-10-11
| | | | | | | | | This reverts r192454 Apparently FileCheck isn't as smart as I though and does not enforce a topological order between variable defs+uses. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192472 91177308-0d34-0410-b5e6-96231b3b80d8
* Tests: Be less dependent on a specific schedule/regallocMatthias Braun2013-10-11
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192454 91177308-0d34-0410-b5e6-96231b3b80d8
* Tests: Use CHECK-LABEL where possibleMatthias Braun2013-10-10
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192403 91177308-0d34-0410-b5e6-96231b3b80d8
* ARM: use TableGen patterns to select CMOV operations.Tim Northover2013-08-22
| | | | | | | | | | | | Back in the mists of time (2008), it seems TableGen couldn't handle the patterns necessary to match ARM's CMOV node that we convert select operations to, so we wrote a lot of fairly hairy C++ to do it for us. TableGen can deal with it now: there were a few minor differences to CodeGen (see tests), but nothing obviously worse that I could see, so we should probably address anything that *does* come up in a localised manner. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188995 91177308-0d34-0410-b5e6-96231b3b80d8
* Mass update to CodeGen tests to use CHECK-LABEL for labels corresponding to ↵Stephen Lin2013-07-14
| | | | | | | | | | | | | | | | | | | | | | | | | | | function definitions for more informative error messages. No functionality change and all updated tests passed locally. This update was done with the following bash script: find test/CodeGen -name "*.ll" | \ while read NAME; do echo "$NAME" if ! grep -q "^; *RUN: *llc.*debug" $NAME; then TEMP=`mktemp -t temp` cp $NAME $TEMP sed -n "s/^define [^@]*@\([A-Za-z0-9_]*\)(.*$/\1/p" < $NAME | \ while read FUNC; do sed -i '' "s/;\(.*\)\([A-Za-z0-9_-]*\):\( *\)$FUNC: *\$/;\1\2-LABEL:\3$FUNC:/g" $TEMP done sed -i '' "s/;\(.*\)-LABEL-LABEL:/;\1-LABEL:/" $TEMP sed -i '' "s/;\(.*\)-NEXT-LABEL:/;\1-NEXT:/" $TEMP sed -i '' "s/;\(.*\)-NOT-LABEL:/;\1-NOT:/" $TEMP sed -i '' "s/;\(.*\)-DAG-LABEL:/;\1-DAG:/" $TEMP mv $TEMP $NAME fi done git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186280 91177308-0d34-0410-b5e6-96231b3b80d8
* Use predication instead of pseudo-opcodes when folding into MOVCC.Jakob Stoklund Olesen2012-09-05
| | | | | | | | | | | | | | | | | | | | Now that it is possible to dynamically tie MachineInstr operands, predicated instructions are possible in SSA form: %vreg3<def> = SUBri %vreg1, -2147483647, pred:14, pred:%noreg, %opt:%noreg %vreg4<def,tied1> = MOVCCr %vreg3<tied0>, %vreg1, %pred:12, pred:%CPSR Becomes a predicated SUBri with a tied imp-use: SUBri %vreg1, -2147483647, pred:13, pred:%CPSR, opt:%noreg, %vreg1<imp-use,tied0> This means that any instruction that is safe to move can be folded into a MOVCC, and the *CC pseudo-instructions are no longer needed. The test case changes reflect that Thumb2SizeReduce recognizes the predicated instructions. It didn't understand the pseudos. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163274 91177308-0d34-0410-b5e6-96231b3b80d8
* Add ADD and SUB to the predicable ARM instructions.Jakob Stoklund Olesen2012-08-16
| | | | | | | | | | It is not my plan to duplicate the entire ARM instruction set with predicated versions. We need a way of representing predicated instructions in SSA form without requiring a separate opcode. Then the pseudo-instructions can go away. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162061 91177308-0d34-0410-b5e6-96231b3b80d8
* Teach the DAG combiner to turn sitofp/uitofp from i1 into a conditional ↵Owen Anderson2012-07-09
| | | | | | | | | move, since there are only two possible values. Previously, this would become an integer extension operation, followed by a real integer->float conversion. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159957 91177308-0d34-0410-b5e6-96231b3b80d8
* Allocate virtual registers in ascending order.Jakob Stoklund Olesen2012-04-02
| | | | | | | | | This is just the fallback tie-breaker ordering, the main allocation order is still descending size. Patch by Shamil Kurmangaleev! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153904 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix SimplifySelectCC to add newly created nodes to the DAGCombinerDan Gohman2011-09-22
| | | | | | | worklist, as it may be possible to perform further optimization on them. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140349 91177308-0d34-0410-b5e6-96231b3b80d8
* Thumb assembly parsing and encoding for ADR.Jim Grosbach2011-08-17
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137864 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix a compiler crash where a Glue value had multiple uses. Radar 9049552.Bob Wilson2011-03-08
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127198 91177308-0d34-0410-b5e6-96231b3b80d8
* These tests are looking for library function names thatDale Johannesen2010-11-17
| | | | | | | | | appear to differ on Linux. Try to make them pass on Linux. Would be good for a Linux person to review this. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119572 91177308-0d34-0410-b5e6-96231b3b80d8
* - Add TargetInstrInfo::getOperandLatency() to compute operand latencies. ThisEvan Cheng2010-10-06
| | | | | | | | | | | | | | allow target to correctly compute latency for cases where static scheduling itineraries isn't sufficient. e.g. variable_ops instructions such as ARM::ldm. This also allows target without scheduling itineraries to compute operand latencies. e.g. X86 can return (approximated) latencies for high latency instructions such as division. - Compute operand latencies for those defined by load multiple instructions, e.g. ldm and those used by store multiple instructions, e.g. stm. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115755 91177308-0d34-0410-b5e6-96231b3b80d8
* Consider this code snippet:Bill Wendling2010-08-11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | float t1(int argc) { return (argc == 1123) ? 1.234f : 2.38213f; } We would generate truly awful code on ARM (those with a weak stomach should look away): _t1: movw r1, #1123 movs r2, #1 movs r3, #0 cmp r0, r1 mov.w r0, #0 it eq moveq r0, r2 movs r1, #4 cmp r0, #0 it ne movne r3, r1 adr r0, #LCPI1_0 ldr r0, [r0, r3] bx lr The problem was that legalization was creating a cascade of SELECT_CC nodes, for for the comparison of "argc == 1123" which was fed into a SELECT node for the ?: statement which was itself converted to a SELECT_CC node. This is because the ARM back-end doesn't have custom lowering for SELECT nodes, so it used the default "Expand". I added a fairly simple "LowerSELECT" to the ARM back-end. It takes care of this testcase, but can obviously be expanded to include more cases. Now we generate this, which looks optimal to me: _t1: movw r1, #1123 movs r2, #0 cmp r0, r1 adr r0, #LCPI0_0 it eq moveq r2, #4 ldr r0, [r0, r2] bx lr .align 2 LCPI0_0: .long 1075344593 @ float 2.382130e+00 .long 1067316150 @ float 1.234000e+00 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110799 91177308-0d34-0410-b5e6-96231b3b80d8
* Use Unified Assembly Syntax for the ARM backend.Jim Grosbach2009-11-09
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86494 91177308-0d34-0410-b5e6-96231b3b80d8
* Convert some ARM tests with lots of greps to use FileCheck.Bob Wilson2009-10-09
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83651 91177308-0d34-0410-b5e6-96231b3b80d8
* Eliminate more uses of llvm-as and llvm-dis.Dan Gohman2009-09-09
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81293 91177308-0d34-0410-b5e6-96231b3b80d8
* Move thumb and thumb2 tests into separate directories.Evan Cheng2009-06-24
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74068 91177308-0d34-0410-b5e6-96231b3b80d8
* Convert tests using "| wc -l | grep ..." to use the count script.Dan Gohman2007-08-15
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41097 91177308-0d34-0410-b5e6-96231b3b80d8
* For PR1319: Upgrade to use new test harnessReid Spencer2007-04-15
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36076 91177308-0d34-0410-b5e6-96231b3b80d8
* -march=arm -enable-thumb => -march=thumbEvan Cheng2007-02-23
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34522 91177308-0d34-0410-b5e6-96231b3b80d8
* For PR761:Reid Spencer2007-01-26
| | | | | | | | | | | | | | | Remove "target endian/pointersize" or add "target datalayout" to make the test parse properly or set the datalayout because defaults changes. For PR645: Make global names use the @ prefix. For llvm-upgrade changes: Fix test cases or completely remove use of llvm-upgrade for test cases that cannot survive the new renaming or upgrade capabilities. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33533 91177308-0d34-0410-b5e6-96231b3b80d8
* ARM test cases contributed by Apple.Evan Cheng2007-01-19
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33354 91177308-0d34-0410-b5e6-96231b3b80d8
* Use the llvm-upgrade program to upgrade llvm assembly.Reid Spencer2006-12-02
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32115 91177308-0d34-0410-b5e6-96231b3b80d8
* more condition codesRafael Espindola2006-09-21
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30567 91177308-0d34-0410-b5e6-96231b3b80d8
* fix select.ll to always test a select nodeRafael Espindola2006-09-08
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30187 91177308-0d34-0410-b5e6-96231b3b80d8
* implement unconditional branchesRafael Espindola2006-09-08
| | | | | | | fix select.ll git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30186 91177308-0d34-0410-b5e6-96231b3b80d8
* This failsChris Lattner2006-09-07
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30148 91177308-0d34-0410-b5e6-96231b3b80d8
* run llc with -march=arm in select.llRafael Espindola2006-08-22
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29821 91177308-0d34-0410-b5e6-96231b3b80d8
* This passes.Chris Lattner2006-08-22
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29813 91177308-0d34-0410-b5e6-96231b3b80d8
* Use the correct syntax.Reid Spencer2006-08-22
| | | | | | | Note to self: test before committing things! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29810 91177308-0d34-0410-b5e6-96231b3b80d8
* Add a simple RUN line so this doesn't always fail. XFAIL this untilReid Spencer2006-08-22
| | | | | | | Rafael can get a chance to fix it. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29809 91177308-0d34-0410-b5e6-96231b3b80d8
* initial support for selectRafael Espindola2006-08-21
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29802 91177308-0d34-0410-b5e6-96231b3b80d8
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