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path: root/test/CodeGen/ARM/vstlane.ll
Commit message (Expand)AuthorAge
* Revert "Tests: Be less dependent on a specific schedule/regalloc"Matthias Braun2013-10-11
* Tests: Be less dependent on a specific schedule/regallocMatthias Braun2013-10-11
* CriticalAntiDepBreaker is no longer needed for armv7 scheduling.Andrew Trick2013-09-25
* Mass update to CodeGen tests to use CHECK-LABEL for labels corresponding to f...Stephen Lin2013-07-14
* Make ARMAsmPrinter generate the correct alignment specifier syntax in instruc...Kristof Beyls2013-02-22
* Also set addrmode6 alignment when align==size.Jakob Stoklund Olesen2011-10-27
* Don't crash on variable insertelement on ARM. PR10258.Eli Friedman2011-10-24
* Fixes a bug in the DAGCombiner. LoadSDNodes have two values (data, chain).Nadav Rotem2011-05-11
* Add patterns to use post-increment addressing for Neon VST1-lane instructions.Bob Wilson2011-02-25
* Add codegen support for using post-increment NEON load/store instructions.Bob Wilson2011-02-07
* Add float patterns for Neon vld1-lane/dup and vst1-lane operations.Bob Wilson2010-12-10
* Add codegen patterns for VST1-lane instructions. Radar 8599955.Bob Wilson2010-11-03
* Support alignment for NEON vld-lane and vst-lane instructions.Bob Wilson2010-10-19
* Add alignment arguments to all the NEON load/store intrinsics.Bob Wilson2010-08-27
* Fix tests for Neon load/store intrinsics to match the i8* types expected byBob Wilson2010-04-20
* Add codegen support for NEON vst4lane intrinsics with 128-bit vectors.Bob Wilson2009-10-09
* Add codegen support for NEON vst3lane intrinsics with 128-bit vectors.Bob Wilson2009-10-08
* Add codegen support for NEON vst2lane intrinsics with 128-bit vectors.Bob Wilson2009-10-08
* Eliminate more uses of llvm-as and llvm-dis.Dan Gohman2009-09-09
* Add support for generating code for vst{234}lane intrinsics.Bob Wilson2009-09-01
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