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* Reapply r143206, with fixes. Disallow physical register lifetimesDan Gohman2011-11-03
| | | | | | | | across calls, and only check for nested dependences on the special call-sequence-resource register. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143660 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert r143206, as there are still some failing tests.Dan Gohman2011-10-29
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143262 91177308-0d34-0410-b5e6-96231b3b80d8
* Reapply r143177 and r143179 (reverting r143188), with schedulerDan Gohman2011-10-28
| | | | | | | | | | fixes: Use a separate register, instead of SP, as the calling-convention resource, to avoid spurious conflicts with actual uses of SP. Also, fix unscheduling of calling sequences, which can be triggered by pseudo-two-address dependencies. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143206 91177308-0d34-0410-b5e6-96231b3b80d8
* Speculatively disable Dan's commits 143177 and 143179 to see ifDuncan Sands2011-10-28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | it fixes the dragonegg self-host (it looks like gcc is miscompiled). Original commit messages: Eliminate LegalizeOps' LegalizedNodes map and have it just call RAUW on every node as it legalizes them. This makes it easier to use hasOneUse() heuristics, since unneeded nodes can be removed from the DAG earlier. Make LegalizeOps visit the DAG in an operands-last order. It previously used operands-first, because LegalizeTypes has to go operands-first, and LegalizeTypes used to be part of LegalizeOps, but they're now split. The operands-last order is more natural for several legalization tasks. For example, it allows lowering code for nodes with floating-point or vector constants to see those constants directly instead of seeing the lowered form (often constant-pool loads). This makes some things somewhat more complicated today, though it ought to allow things to be simpler in the future. It also fixes some bugs exposed by Legalizing using RAUW aggressively. Remove the part of LegalizeOps that attempted to patch up invalid chain operands on libcalls generated by LegalizeTypes, since it doesn't work with the new LegalizeOps traversal order. Instead, define what LegalizeTypes is doing to be correct, and transfer the responsibility of keeping calls from having overlapping calling sequences into the scheduler. Teach the scheduler to model callseq_begin/end pairs as having a physical register definition/use to prevent calls from having overlapping calling sequences. This is also somewhat complicated, though there are ways it might be simplified in the future. This addresses rdar://9816668, rdar://10043614, rdar://8434668, and others. Please direct high-level questions about this patch to management. Delete #if 0 code accidentally left in. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143188 91177308-0d34-0410-b5e6-96231b3b80d8
* Eliminate LegalizeOps' LegalizedNodes map and have it just call RAUWDan Gohman2011-10-28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | on every node as it legalizes them. This makes it easier to use hasOneUse() heuristics, since unneeded nodes can be removed from the DAG earlier. Make LegalizeOps visit the DAG in an operands-last order. It previously used operands-first, because LegalizeTypes has to go operands-first, and LegalizeTypes used to be part of LegalizeOps, but they're now split. The operands-last order is more natural for several legalization tasks. For example, it allows lowering code for nodes with floating-point or vector constants to see those constants directly instead of seeing the lowered form (often constant-pool loads). This makes some things somewhat more complicated today, though it ought to allow things to be simpler in the future. It also fixes some bugs exposed by Legalizing using RAUW aggressively. Remove the part of LegalizeOps that attempted to patch up invalid chain operands on libcalls generated by LegalizeTypes, since it doesn't work with the new LegalizeOps traversal order. Instead, define what LegalizeTypes is doing to be correct, and transfer the responsibility of keeping calls from having overlapping calling sequences into the scheduler. Teach the scheduler to model callseq_begin/end pairs as having a physical register definition/use to prevent calls from having overlapping calling sequences. This is also somewhat complicated, though there are ways it might be simplified in the future. This addresses rdar://9816668, rdar://10043614, rdar://8434668, and others. Please direct high-level questions about this patch to management. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143177 91177308-0d34-0410-b5e6-96231b3b80d8
* Change the default scheduler from Latency to ILP, since LatencyDan Gohman2011-10-24
| | | | | | | is going away. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142810 91177308-0d34-0410-b5e6-96231b3b80d8
* Test cases for 64-bit load and store instructions.Akira Hatanaka2011-10-11
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141631 91177308-0d34-0410-b5e6-96231b3b80d8
* Move CHECK after entry label.Akira Hatanaka2011-10-03
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141030 91177308-0d34-0410-b5e6-96231b3b80d8
* Add support for 64-bit logical NOR.Akira Hatanaka2011-10-03
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141029 91177308-0d34-0410-b5e6-96231b3b80d8
* Add support for 64-bit count leading ones and zeros instructions.Akira Hatanaka2011-10-03
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141028 91177308-0d34-0410-b5e6-96231b3b80d8
* Add support for 64-bit divide instructions.Akira Hatanaka2011-10-03
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141024 91177308-0d34-0410-b5e6-96231b3b80d8
* Add support for 64-bit integer multiply instructions.Akira Hatanaka2011-10-03
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141017 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove unnecessary checking of register operands.Akira Hatanaka2011-09-30
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140872 91177308-0d34-0410-b5e6-96231b3b80d8
* Add definitions of Mips64 rotate instructions.Akira Hatanaka2011-09-30
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140870 91177308-0d34-0410-b5e6-96231b3b80d8
* Check values of immediate operands.Akira Hatanaka2011-09-30
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140860 91177308-0d34-0410-b5e6-96231b3b80d8
* Mips64 shift instructions.Akira Hatanaka2011-09-30
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140841 91177308-0d34-0410-b5e6-96231b3b80d8
* Mips64 arithmetic and logical instructions with one source register andAkira Hatanaka2011-09-30
| | | | | | | immediate. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140839 91177308-0d34-0410-b5e6-96231b3b80d8
* Fill delay slot with useful instructions. Modified from Sparc's version of delayAkira Hatanaka2011-09-29
| | | | | | | | | slot filler. Patch by Reed Kotler at Mips Technologies. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140825 91177308-0d34-0410-b5e6-96231b3b80d8
* Mips64 arithmetic and logical instructions with two source registers.Akira Hatanaka2011-09-29
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140806 91177308-0d34-0410-b5e6-96231b3b80d8
* Convert more tests over to the new atomic instructions.Eli Friedman2011-09-26
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140559 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove +.Akira Hatanaka2011-09-21
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140266 91177308-0d34-0410-b5e6-96231b3b80d8
* Re-enable some of the disabled tests. Use FileCheck instead of grep to checkAkira Hatanaka2011-09-21
| | | | | | | | | output. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140263 91177308-0d34-0410-b5e6-96231b3b80d8
* Delete test cases that generate code for allegrex/psp and cannot be repurposed.Akira Hatanaka2011-09-13
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139652 91177308-0d34-0410-b5e6-96231b3b80d8
* Add pattern used to match MipsLo, which is needed when the instruction selectorAkira Hatanaka2011-09-13
| | | | | | | | | | tries to match a dead MipsLo node (explanation in the link below). http://article.gmane.org/gmane.comp.compilers.llvm.devel/42757/match=dagcombiner+dead git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139634 91177308-0d34-0410-b5e6-96231b3b80d8
* Disable tests which generate code for allegrex or psp.Akira Hatanaka2011-09-13
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139632 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix test cases.Akira Hatanaka2011-09-09
| | | | | | | Generate code for Mips32r1 unless a Mips32r2 feature is tested. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139433 91177308-0d34-0410-b5e6-96231b3b80d8
* Drop support for Mips1 and Mips2.Akira Hatanaka2011-09-09
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139405 91177308-0d34-0410-b5e6-96231b3b80d8
* Drop support for Allegrex. Allegrex implements a variant of Mips2.Akira Hatanaka2011-09-09
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139383 91177308-0d34-0410-b5e6-96231b3b80d8
* Change default target architecture from Mips1 to Mips32r1 in preparation forAkira Hatanaka2011-09-09
| | | | | | | | | | removing support for Mips1 and Mips2. This change and the ones that follow have been discussed with and approved by Bruno. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139344 91177308-0d34-0410-b5e6-96231b3b80d8
* Disable these tests harder. They're XFAIL'd, but that means they still run, andNick Lewycky2011-09-06
| | | | | | | these tests all infinitely recurse, bringing my system down into swapping hell. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139192 91177308-0d34-0410-b5e6-96231b3b80d8
* Better fix for this testcase. Update it to the new EH scheme entirely.Bill Wendling2011-09-02
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139039 91177308-0d34-0410-b5e6-96231b3b80d8
* Update for new EH stuff. (I'm not sure if this is 100% correct.)Bill Wendling2011-09-02
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139038 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert r131152, r129796, r129761. This code is currently consideredDan Gohman2011-09-01
| | | | | | | | | to be unreliable on platforms which require memcpy calls, and it is complicating broader legalize cleanups. It is hoped that these cleanups will make memcpy byval easier to implement in the future. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138977 91177308-0d34-0410-b5e6-96231b3b80d8
* Use subword loads instead of a 4-byte load when the size of a structure (or aAkira Hatanaka2011-08-18
| | | | | | | | piece of it) that is being passed by value is smaller than a word. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138007 91177308-0d34-0410-b5e6-96231b3b80d8
* Add support for ext and ins.Akira Hatanaka2011-08-17
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137804 91177308-0d34-0410-b5e6-96231b3b80d8
* Add test case for r137711.Akira Hatanaka2011-08-16
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137725 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix handling of double precision loads and stores when Mips1 is targeted. Akira Hatanaka2011-08-16
| | | | | | | | | | | | | | | | | Mips1 does not support double precision loads or stores, therefore two single precision loads or stores must be used in place of these instructions. This patch treats double precision loads and stores as if they are legal instructions until MCInstLowering, instead of generating the single precision instructions during instruction selection or Prolog/Epilog code insertion. Without the changes made in this patch, llc produces code that has the same problem described in r137484 or bails out when MipsInstrInfo::storeRegToStackSlot or loadRegFromStackSlot is called before register allocation. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137711 91177308-0d34-0410-b5e6-96231b3b80d8
* Define unaligned load and store. Akira Hatanaka2011-08-12
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137515 91177308-0d34-0410-b5e6-96231b3b80d8
* Test case for 137484Akira Hatanaka2011-08-12
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137486 91177308-0d34-0410-b5e6-96231b3b80d8
* Enclose directive .cprestore with .set macro and nomacro to silence assemblerAkira Hatanaka2011-08-11
| | | | | | | | warning. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137378 91177308-0d34-0410-b5e6-96231b3b80d8
* Lower memory barriers to sync instructions.Akira Hatanaka2011-07-19
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135537 91177308-0d34-0410-b5e6-96231b3b80d8
* Use the correct opcodes: SLLV/SRLV or AND must be used instead of SLL/SRL orAkira Hatanaka2011-07-19
| | | | | | | ANDi, when the instruction does not have any immediate operands. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135520 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove redundant instructions.Akira Hatanaka2011-07-19
| | | | | | | | | | - In EmitAtomicBinaryPartword, mask incr in loopMBB only if atomic.swap is the instruction being expanded, instead of masking it in thisMBB. - Remove redundant Or in EmitAtomicCmpSwap. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135495 91177308-0d34-0410-b5e6-96231b3b80d8
* Do not treat atomic.load.sub differently than other atomic binary intrinsics.Akira Hatanaka2011-07-18
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135418 91177308-0d34-0410-b5e6-96231b3b80d8
* Set mayLoad or mayStore flags for SC and LL in order to prevent LICM from Akira Hatanaka2011-07-18
| | | | | | | | | moving them out of the loop. Previously, stores and loads to a stack frame object were inserted to accomplish this. Remove the code that was needed to do this. Patch by Sasa Stankovic. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135415 91177308-0d34-0410-b5e6-96231b3b80d8
* Change the chain input of nodes that load the address of a function. This changeAkira Hatanaka2011-06-24
| | | | | | | | | | | enables SelectionDAG::getLoad at MipsISelLowering.cpp:1914 to return a pre-existing node instead of redundantly create a new node every time it is called. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133811 91177308-0d34-0410-b5e6-96231b3b80d8
* Prevent generation of redundant addiu instructions that compute address of Akira Hatanaka2011-06-24
| | | | | | | | | static variables or functions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133803 91177308-0d34-0410-b5e6-96231b3b80d8
* Re-apply 132758 and 132768 which were speculatively reverted in 132777. Akira Hatanaka2011-06-21
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133494 91177308-0d34-0410-b5e6-96231b3b80d8
* make the asmparser reject function and type redefinitions. 'Merging' hasn't ↵Chris Lattner2011-06-17
| | | | | | | | | been needed since llvm-gcc 3.4 days. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133248 91177308-0d34-0410-b5e6-96231b3b80d8
* manually upgrade a bunch of tests to modern syntax, and remove some thatChris Lattner2011-06-17
| | | | | | | | are either unreduced or only test old syntax. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133228 91177308-0d34-0410-b5e6-96231b3b80d8
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