Commit message (Collapse) | Author | Age | |
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* | Replace sra with srl if a single sign bit is required | Richard Sandiford | 2013-10-17 |
| | | | | | | | E.g. (and (sra (i32 x) 31) 2) -> (and (srl (i32 x) 30) 2). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192884 91177308-0d34-0410-b5e6-96231b3b80d8 | ||
* | Fix a PPC rlwimi instruction-selection bug | Hal Finkel | 2013-06-28 |
Under certain (evidently rare) circumstances, this code used to convert OR(a, AND(x, y)) into OR(a, x). This was incorrect. While there, I've added a comment to the code immediately above. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185201 91177308-0d34-0410-b5e6-96231b3b80d8 |