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	Commit message (Collapse)	Author	Age
*	R600: Non vector only instruction can be scheduled on trans unit	Vincent Lejeune	2013-09-04
\| \| \| \|	git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189980 91177308-0d34-0410-b5e6-96231b3b80d8
*	Revert "R600: Non vector only instruction can be scheduled on trans unit"	Tom Stellard	2013-07-31
\| \| \| \| \| \|	This reverts commit 98ce62780ea7185ba710868bf83c8077e8d7f6d6. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187526 91177308-0d34-0410-b5e6-96231b3b80d8
*	R600: Non vector only instruction can be scheduled on trans unit	Vincent Lejeune	2013-07-31
\| \| \| \|	git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187514 91177308-0d34-0410-b5e6-96231b3b80d8
*	R600: Prettier asmPrint of Alu	Vincent Lejeune	2013-05-02
\| \| \| \|	git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180956 91177308-0d34-0410-b5e6-96231b3b80d8
*	Add R600 backend	Tom Stellard	2012-12-11
	A new backend supporting AMD GPUs: Radeon HD2XXX - HD7XXX git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169915 91177308-0d34-0410-b5e6-96231b3b80d8