llvm - Unofficial llvm GIT mirror used in EmbToolkit

	Commit message (Expand)	Author	Age
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*	R600: Change the RAT instruction assembly names so they match the docs	Tom Stellard	2013-08-16
*	[tests] Cleanup initialization of test suffixes.	Daniel Dunbar	2013-08-16
*	R600/SI: Improve legalization of vector operations	Tom Stellard	2013-08-14
*	R600/SI: Replace v1i32 type with i32 in imageload and sample intrinsics	Tom Stellard	2013-08-14
*	R600/SI: Convert v16i8 resource descriptors to i128	Tom Stellard	2013-08-14
*	R600/SI: Use i8 types for resource descriptors in tests	Tom Stellard	2013-08-14
*	R600/SI: Lower BUILD_VECTOR to REG_SEQUENCE v2	Tom Stellard	2013-08-14
*	R600/SI: Assign a register class to the $vaddr operand for MIMG instructions	Tom Stellard	2013-08-14
*	R600/SI: Handle MSAA texture targets	Tom Stellard	2013-08-14
*	R600/SI: Allow conversion between v32i8 and v8i32	Tom Stellard	2013-08-14
*	R600/SI: Add pattern for fp_to_uint	Tom Stellard	2013-08-14
*	R600: Set scheduling preference to Sched::Source	Tom Stellard	2013-08-12
*	R600/SI: FMA is faster than fmul and fadd for f64	Niels Ole Salscheider	2013-08-10
*	R600/SI: Add FMA pattern	Niels Ole Salscheider	2013-08-10
*	R600/SI: Implement fp32<->fp64 conversions	Niels Ole Salscheider	2013-08-08
*	R600/SI: Implement sint<->fp64 conversions	Niels Ole Salscheider	2013-08-08
*	R600/SI: Use VSrc_* register classes as the default classes for types	Tom Stellard	2013-08-06
*	R600/SI: Add more special cases for opcodes to ensureSRegLimit()	Tom Stellard	2013-08-06
*	Factor FlattenCFG out from SimplifyCFG	Tom Stellard	2013-08-06
*	R600/SI: Add missing test for r187749	Tom Stellard	2013-08-05
*	R600: Add 64-bit float load/store support	Tom Stellard	2013-08-01
*	R600: Use 64-bit alignment for 64-bit kernel arguments	Tom Stellard	2013-08-01
*	R600/SI: Custom lower i64 ZERO_EXTEND	Tom Stellard	2013-08-01
*	Revert "R600: Non vector only instruction can be scheduled on trans unit"	Tom Stellard	2013-07-31
*	R600: Avoid more than 4 literals in the same instruction group at scheduling	Vincent Lejeune	2013-07-31
*	R600: Non vector only instruction can be scheduled on trans unit	Vincent Lejeune	2013-07-31
*	R600/SI: Expand vector fp <-> int conversions	Tom Stellard	2013-07-30
*	[R600] Replicate old DAGCombiner behavior in target specific DAG combine.	Quentin Colombet	2013-07-30
*	[DAGCombiner] insert_vector_elt: Avoid building a vector twice.	Quentin Colombet	2013-07-30
*	DAGCombiner: Pass the correct type to TargetLowering::isF(Abs\|Neg)Free	Tom Stellard	2013-07-23
*	R600: Treat CONSTANT_ADDRESS loads like GLOBAL_ADDRESS loads when necessary	Tom Stellard	2013-07-23
*	R600: Add support for 24-bit MAD instructions	Tom Stellard	2013-07-23
*	R600: Add support for 24-bit MUL instructions	Tom Stellard	2013-07-23
*	R600: Improve support for < 32-bit loads	Tom Stellard	2013-07-23
*	R600: Move CONST_ADDRESS folding into AMDGPUDAGToDAGISel::Select()	Tom Stellard	2013-07-23
*	R600: Use KCache for kernel arguments	Tom Stellard	2013-07-23
*	R600: Use the same compute kernel calling convention for all GPUs	Tom Stellard	2013-07-23
*	R600: Use correct LoadExtType when lowering kernel arguments	Tom Stellard	2013-07-23
*	R600: Clean up extended load patterns	Tom Stellard	2013-07-23
*	R600: Expand vector FNEG	Tom Stellard	2013-07-23
*	R600: Don't emit empty then clause and use alu_pop_after	Vincent Lejeune	2013-07-19
*	R600/SI: Fix crash with VSELECT	Tom Stellard	2013-07-18
*	R600/SI: Add support for v2f32 loads	Tom Stellard	2013-07-18
*	R600/SI: Add support for v2f32 stores	Tom Stellard	2013-07-18
*	R600: Expand VSELECT for all types	Tom Stellard	2013-07-18
*	R600/SI: Add support for 64-bit loads	Tom Stellard	2013-07-15
*	R600: Reapply testcase from r186178, the big endian issue should be fixed by ...	Benjamin Kramer	2013-07-12
*	R600: Remove the fpconst64.ll test which was failing on non-x86 buildbots	Tom Stellard	2013-07-12
*	R600/SI: Add support for f64 kernel arguments	Tom Stellard	2013-07-12
*	R600/SI: Implement select and compares for SI	Tom Stellard	2013-07-12