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* R600: Use BCNT_INT for evergreenMatt Arsenault2014-06-10
* R600/SI: Implement i64 ctpopMatt Arsenault2014-06-10
* R600/SI: Use bcnt instruction for ctpopMatt Arsenault2014-06-10
* R600: Handle fcopysignMatt Arsenault2014-06-10
* R600/SI: Handle sign_extend and zero_extend to i64 with patterns.Matt Arsenault2014-06-10
* SelectionDAG: Expand SELECT_CC to SELECT + SETCCTom Stellard2014-06-10
* Reduce verbiage of lit.local.cfg filesAlp Toker2014-06-09
* R600/SI: Keep 64-bit not on SALUMatt Arsenault2014-06-09
* R600: Fix selection failure for vector bswapMatt Arsenault2014-06-09
* R600: Add more and testcasesMatt Arsenault2014-06-09
* Allow aliases to be unnamed_addr.Rafael Espindola2014-06-06
* R600: Fix test. Using wrong check prefix.Matt Arsenault2014-06-05
* R600/SI: Match rsq instructionsMatt Arsenault2014-06-05
* R600/SI: Fix [s|u]int_to_fp for i1Matt Arsenault2014-05-31
* R600: Try to convert BFE back to standard bit ops when possible.Matt Arsenault2014-05-22
* R600: Add dag combine for BFEMatt Arsenault2014-05-22
* R600: Implement ComputeNumSignBitsForTargetNode for BFEMatt Arsenault2014-05-22
* R600: Expand mul24 for GPUs without itMatt Arsenault2014-05-22
* R600: Expand mad24 for GPUs without itMatt Arsenault2014-05-22
* R600: Add intrinsics for mad24Matt Arsenault2014-05-22
* R600/SI: Match fp_to_uint / uint_to_fp for f64Matt Arsenault2014-05-22
* R600: Partially fix constant initializers for structs and vectors.Matt Arsenault2014-05-21
* R600: Add failing testcases for constant initializers.Matt Arsenault2014-05-21
* R600/SI: Promote f32 SELECT to i32Tom Stellard2014-05-16
* R600/SI: Only use SALU instructions for 64-bit add in a block of CF depth 0Tom Stellard2014-05-15
* R600/SI: Use VALU instructions for i1 opsTom Stellard2014-05-15
* Rename ComputeMaskedBits to computeKnownBits. "Masked" has beenJay Foad2014-05-14
* R600/SI: Try to fix BFE operands when moving to VALUMatt Arsenault2014-05-13
* R600: Add mul24 intrinsicsMatt Arsenault2014-05-12
* Make SimplifyDemandedBits understand BUILD_PAIRMatt Arsenault2014-05-12
* R600/SI: Fold fabs/fneg into src input modifierVincent Lejeune2014-05-10
* R600/SI: Prettier display of input modifiersVincent Lejeune2014-05-10
* R600/SI: Teach SIInstrInfo::moveToVALU() how to move S_LOAD_*_IMM instructionsTom Stellard2014-05-09
* R600/SI: Fix SMRD pattern for offsets > 32 bitsTom Stellard2014-05-09
* R600: Expand i64 SELECT_CCTom Stellard2014-05-09
* R600: Move MIN/MAX matching from LowerOperation() to PerformDAGCombine()Tom Stellard2014-05-09
* R600: Expand i64 ISD:SUBTom Stellard2014-05-05
* R600: Expand vector sin and cos.Tom Stellard2014-05-02
* R600: Expand TruncStore i64 -> {i16,i8}Tom Stellard2014-05-02
* R600/SI: Fix verifier error with pseudo store instructions.Matt Arsenault2014-05-01
* R600/SI: Use VALU instructions for copying i1 valuesTom Stellard2014-04-30
* R600/SI: Teach moveToVALU how to handle some SMRD instructionsTom Stellard2014-04-30
* R600/SI: Custom lower SI_IF and SI_ELSE to avoid machine verifier errorsTom Stellard2014-04-29
* R600/SI: Only select SALU instructions in the entry or exit blockTom Stellard2014-04-29
* R600: optimize the UDIVREM 64 algorithmTom Stellard2014-04-29
* R600: Add a test that used to be broken that I forgot to addMatt Arsenault2014-04-23
* R600: Emit error instead of unreachable on function callMatt Arsenault2014-04-22
* R600: Make sign_extend_inreg legal.Matt Arsenault2014-04-22
* R600/SI: Try to use scalar BFE.Matt Arsenault2014-04-18
* R600/SI: Match sign_extend_inreg to s_sext_i32_i8 and s_sext_i32_i16Matt Arsenault2014-04-18
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