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* Run the pre-register allocation tail duplication pass by default. RemoveBob Wilson2010-01-16
| | | | | | | | the -pre-regalloc-taildup command-line option, and add a new -disable-early-taildup option. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93597 91177308-0d34-0410-b5e6-96231b3b80d8
* add testcase for r93564Jim Grosbach2010-01-15
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93567 91177308-0d34-0410-b5e6-96231b3b80d8
* Add test case for the phi reuse patch.Jakob Stoklund Olesen2009-12-18
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91642 91177308-0d34-0410-b5e6-96231b3b80d8
* More consistent thumb1 asm printing.Evan Cheng2009-11-19
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89328 91177308-0d34-0410-b5e6-96231b3b80d8
* Refactor code. Fix a potential missing check. Teach isIdentical() about ↵Evan Cheng2009-11-07
| | | | | | tLDRpci_pic. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86330 91177308-0d34-0410-b5e6-96231b3b80d8
* Enable allocation of R3 in Thumb1Jim Grosbach2009-10-19
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@84563 91177308-0d34-0410-b5e6-96231b3b80d8
* Forgot about ARM::tPUSH. It also has a new writeback operand.Evan Cheng2009-10-02
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83237 91177308-0d34-0410-b5e6-96231b3b80d8
* ARM::tPOP and tPOP_RET each has an extra writeback operand now.Evan Cheng2009-10-01
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83214 91177308-0d34-0410-b5e6-96231b3b80d8
* Eliminate more uses of llvm-as and llvm-dis.Dan Gohman2009-09-09
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81293 91177308-0d34-0410-b5e6-96231b3b80d8
* v4, v5 does not support sxtb / sxth.Evan Cheng2009-08-28
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80322 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix an obvious copy-n-paste bug.Evan Cheng2009-08-20
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79535 91177308-0d34-0410-b5e6-96231b3b80d8
* tPOP_RET now has predicate operands.Evan Cheng2009-08-13
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78898 91177308-0d34-0410-b5e6-96231b3b80d8
* It's ok to spill a tGPR register as long as it's still allocated a low register.Evan Cheng2009-08-13
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78893 91177308-0d34-0410-b5e6-96231b3b80d8
* tADDrSPI doesn't have a predicate operand, but tADDhirr and tADDi3 have.Evan Cheng2009-07-28
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77305 91177308-0d34-0410-b5e6-96231b3b80d8
* remove a very large testcase for now.Chris Lattner2009-07-21
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76537 91177308-0d34-0410-b5e6-96231b3b80d8
* Re-apply 75490, 75806 and 76177 with fixes and tests. Efficiency comesDavid Greene2009-07-20
| | | | | | | next. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76486 91177308-0d34-0410-b5e6-96231b3b80d8
* Use TII->findCommutedOpIndices to find the commute operands (rather than ↵Evan Cheng2009-07-20
| | | | | | guessing). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76472 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix some sub-reg coalescing bugs where the coalescer wasn't updating the ↵Evan Cheng2009-07-20
| | | | | | resulting interval's register class. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76458 91177308-0d34-0410-b5e6-96231b3b80d8
* Restore AsmWriterEmitter.cpp back to 74742. The recent changes broke Thumb.Evan Cheng2009-07-20
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76398 91177308-0d34-0410-b5e6-96231b3b80d8
* Smarter isel of ldrsb / ldrsh. Only make use of these when [r,r] address is ↵Evan Cheng2009-07-11
| | | | | | feasible. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75360 91177308-0d34-0410-b5e6-96231b3b80d8
* Major changes to Thumb (not Thumb2). Many 16-bit instructions either ↵Evan Cheng2009-07-11
| | | | | | | | | modifies CPSR when they are outside the IT blocks, or they can predicated when in Thumb2. Move the implicit def of CPSR to an optional def which defaults CPSR. This allows the 's' bit to be toggled dynamically. A side-effect of this change is asm printer is now using unified assembly. There are some minor clean ups and fixes as well. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75359 91177308-0d34-0410-b5e6-96231b3b80d8
* Add missing tests.Evan Cheng2009-07-07
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74945 91177308-0d34-0410-b5e6-96231b3b80d8
* We should run these tests as well.Evan Cheng2009-06-24
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74121 91177308-0d34-0410-b5e6-96231b3b80d8
* Move thumb and thumb2 tests into separate directories.Evan Cheng2009-06-24
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74068 91177308-0d34-0410-b5e6-96231b3b80d8
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