| Commit message (Collapse) | Author | Age | |
|---|---|---|---|
| * | Fix pr11193. | Nadav Rotem | 2011-10-22 |
| | | | | | | | | | | SHL inserts zeros from the right, thus even when the original sign_extend_inreg value was of 1-bit, we need to sra. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142724 91177308-0d34-0410-b5e6-96231b3b80d8 | ||
| * | 1. Fix the widening of SETCC in WidenVecOp_SETCC. Use the correct return CC ↵ | Nadav Rotem | 2011-10-21 |
| type. 2. Fix a typo in CONCAT_VECTORS which exposed the bug in #1. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142648 91177308-0d34-0410-b5e6-96231b3b80d8 | |||
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