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	Commit message (Collapse)	Author	Age
*	Move testcase, this is testing extraction not inserting.	Benjamin Kramer	2013-03-07
\| \| \| \|	git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176635 91177308-0d34-0410-b5e6-96231b3b80d8
*	X86: Fold EXTRACT_SUBVECTORs of a BUILD_VECTOR into a smaller BUILD_VECTOR.	Benjamin Kramer	2013-03-07
\| \| \| \| \| \| \| \| \| \|	That can usually be lowered efficiently and is common in sandybridge code. It would be nice to do this in DAGCombiner but we can't insert arbitrary BUILD_VECTORs this late. Fixes PR15462. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176634 91177308-0d34-0410-b5e6-96231b3b80d8
*	Fix test.	Chad Rosier	2012-03-20
\| \| \| \|	git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153095 91177308-0d34-0410-b5e6-96231b3b80d8
*	[avx] Adjust the VINSERTF128rm pattern to allow for unaligned loads.	Chad Rosier	2012-03-20
\| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \|	This results in things such as vmovups 16(%rdi), %xmm0 vinsertf128 $1, %xmm0, %ymm0, %ymm0 to be combined to vinsertf128 $1, 16(%rdi), %ymm0, %ymm0 rdar://11076953 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153092 91177308-0d34-0410-b5e6-96231b3b80d8
*	[avx] Add patterns for VINSERTF128rm.	Chad Rosier	2012-03-15
\| \| \| \| \| \| \| \| \| \| \| \| \| \| \|	This results in things such as vmovaps -96(%rbx), %xmm1 vinsertf128 $1, %xmm1, %ymm0, %ymm0 to be combined to vinsertf128 $1, -96(%rbx), %ymm0, %ymm0 rdar://10643481 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152762 91177308-0d34-0410-b5e6-96231b3b80d8
*	Turn avx insert intrinsic calls into INSERT_SUBVECTOR DAG nodes and remove ↵	Pete Cooper	2012-02-24
\| \| \| \| \| \|	duplicate patterns for selecting the intrinsics git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151342 91177308-0d34-0410-b5e6-96231b3b80d8
*	Add a DAGCombine for subvector extracts to remove useless chains of	Bruno Cardoso Lopes	2011-09-20
\| \| \| \| \| \| \|	subvector inserts and extracts. Initial patch by Rackover, Zvi with some tweak done by me. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140204 91177308-0d34-0410-b5e6-96231b3b80d8
*	Revert r140097, working on a better approach	Bruno Cardoso Lopes	2011-09-20
\| \| \| \|	git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140203 91177308-0d34-0410-b5e6-96231b3b80d8
*	Based on the small opt Zvi's patch was trying to achieve, eliminate	Bruno Cardoso Lopes	2011-09-19
\| \| \| \| \| \|	128-bit undef subvector insertion into a 256-bit vector git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140097 91177308-0d34-0410-b5e6-96231b3b80d8
*	Fix PR10656. It's only profitable to use 128-bit inserts and extracts	Bruno Cardoso Lopes	2011-08-15
\| \| \| \| \| \| \|	when AVX mode is one. Otherwise is just more work for the type legalizer. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137661 91177308-0d34-0410-b5e6-96231b3b80d8
*	Add a dag combine to xform 256-bit shuffles into simple vector	Bruno Cardoso Lopes	2011-08-11
	inserts and extracts. This simple combine makes us generate only 1 instruction instead of 11 in the v8 case. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137362 91177308-0d34-0410-b5e6-96231b3b80d8