Commit message (Collapse) | Author | Age | |
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* | Optimize vector select from all 0s or all 1s | Michael Liao | 2013-04-11 |
As packed comparisons in AVX/SSE produce all 0s or all 1s in each SIMD lane, vector select could be simplified to AND/OR or removed if one or both values being selected is all 0s or all 1s. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179267 91177308-0d34-0410-b5e6-96231b3b80d8 |