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X86
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Author
Age
...
*
[DAGCombiner] Revert load slicing (r192471), until I figure out why it fails ...
Quentin Colombet
2013-10-11
*
[DAGCombiner] Slice a big load in two loads when the element are next to each
Quentin Colombet
2013-10-11
*
Tests: Do not unnecessarily depend on kill comments
Matthias Braun
2013-10-10
*
Disable function padding to get this test to pass on atom.
Benjamin Kramer
2013-10-10
*
AVX-512: Added VRCP28 and VRSQRT28 instructions and intrinsics.
Elena Demikhovsky
2013-10-09
*
Add in64BitMode/in32BitMode to the MMX/SSE2/AVX maskmovq/dq instructions. Thi...
Craig Topper
2013-10-09
*
Fix a typo in the mattr part of the run line.
Craig Topper
2013-10-08
*
Explicitly disable AVX on a bunch of tests so they won't fail on AVX machines...
Craig Topper
2013-10-08
*
Remove some instructions that existed to provide aliases to the assembler. Ca...
Craig Topper
2013-10-08
*
X86: Fix type check. Just because an integer type is illegal doesn't mean it'...
Benjamin Kramer
2013-10-07
*
Change objectsize intrinsic to accept different address spaces.
Matt Arsenault
2013-10-07
*
Add support for aliases with linkonce_odr.
Rafael Espindola
2013-10-06
*
Force a CPU that doesn't have AVX, otherwise this test fails.
Benjamin Kramer
2013-10-06
*
X86: Don't fold spills into SSE operations if the stack is unaligned.
Benjamin Kramer
2013-10-06
*
AVX-512: added scalar convert instructions and intrinsics.
Elena Demikhovsky
2013-10-06
*
AVX-512: fixed shuffle lowering
Elena Demikhovsky
2013-10-06
*
Emit a better error when running out of registers on inline asm.
Benjamin Kramer
2013-10-05
*
Remove unneeded TBM intrinsics. The arithmetic/logical operation patterns are...
Craig Topper
2013-10-05
*
Add an additional pattern for BLCI since opt can turn (not (add x, 1)) into (...
Craig Topper
2013-10-05
*
Convert test to FileCheck.
Rafael Espindola
2013-10-05
*
Remove duplicated test cases that occurred when I applied the same patch file...
Craig Topper
2013-10-03
*
Add patterns for selecting TBM instructions from logical operations. Patch fr...
Craig Topper
2013-10-03
*
AVX-512: fixed a bug in getLoadStoreRegOpcode() for AVX-512 target
Elena Demikhovsky
2013-10-02
*
Add test case for PR16785.
Preston Gurd
2013-10-01
*
AVX-512: Added X86vzmovl patterns
Elena Demikhovsky
2013-10-01
*
TBAA: remove !tbaa from testing cases when they are not needed.
Manman Ren
2013-09-30
*
Adding intrinsics to the llvm backend for TBM instruction set.
Yunzhong Gao
2013-09-27
*
Remove superfluous comment accidentally checked-in.
Andrea Di Biagio
2013-09-27
*
Re-apply the change from r191393 with fix for pr17380.
Andrea Di Biagio
2013-09-27
*
Revert r191393 since it caused pr17380.
Andrea Di Biagio
2013-09-26
*
Test commit. Removed trailing whitespace.
Josh Magee
2013-09-25
*
Teach DAGCombiner how to canonicalize dags according to the rule
Andrea Di Biagio
2013-09-25
*
Add missing check to SETCC optimization.
Eli Friedman
2013-09-24
*
[stackprotector] Forgot to add in PR number to test case.
Michael Gottesman
2013-09-24
*
[stackprotector] Allow for copies from vreg -> vreg to be in a terminator seq...
Michael Gottesman
2013-09-24
*
Selecting the address from a very long chain of GEPs can blow the stack.
Bill Wendling
2013-09-24
*
Add sha intrinsic tests
Ben Langmuir
2013-09-23
*
ISelDAG: spot chain cycles involving MachineNodes
Tim Northover
2013-09-22
*
Revert "SelectionDAG: Teach the legalizer to split SETCC if VSELECT needs spl...
Juergen Ributzka
2013-09-21
*
[X86] Emulate AVX 256bit MIN/MAX support by splitting the vector.
Juergen Ributzka
2013-09-21
*
SelectionDAG: Teach the legalizer to split SETCC if VSELECT needs splitting too.
Juergen Ributzka
2013-09-21
*
PR16726: extend rol/ror matching
Kai Nacke
2013-09-19
*
Revert PR16726: extend rol/ror matching
Kai Nacke
2013-09-19
*
PR16726: extend rol/ror matching
Kai Nacke
2013-09-19
*
Add testcase to make sure we don't generate too many jumps for a une compare.
Bill Wendling
2013-09-19
*
DAGCombiner: Don't fold vector muls with constants that look like a splat of ...
Benjamin Kramer
2013-09-19
*
X86: FrameIndex addressing modes do have a base register.
Tim Northover
2013-09-19
*
Attempt to fix llvm-ppc64-linux2 buildbot failure by adding
Preston Gurd
2013-09-18
*
Verify that llvm can generate the prefetchw instruction when the CPU is
Preston Gurd
2013-09-18
*
Lift alignment restrictions for load/store folding on VINSERTF128/VEXTRACTF12...
Craig Topper
2013-09-18
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