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* Reduce the testAnton Korobeynikov2009-08-22
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79703 91177308-0d34-0410-b5e6-96231b3b80d8
* Use CHECK-NEXT to make sure we're only getting one copy of each shuffleBob Wilson2009-08-22
| | | | | | | instruction. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79702 91177308-0d34-0410-b5e6-96231b3b80d8
* Match VTRN, VZIP, and VUZP shuffles. Restore the tests for these operations,Bob Wilson2009-08-21
| | | | | | | now using shuffles instead of intrinsics. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79673 91177308-0d34-0410-b5e6-96231b3b80d8
* Add fcopysign instructionsAnton Korobeynikov2009-08-21
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79664 91177308-0d34-0410-b5e6-96231b3b80d8
* Handle 'r' inline asm constraintAnton Korobeynikov2009-08-21
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79648 91177308-0d34-0410-b5e6-96231b3b80d8
* Add some tests for vext.16 and vext.32.Bob Wilson2009-08-21
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79638 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove Neon intrinsics for VZIP, VUZP, and VTRN. We will represent these asBob Wilson2009-08-21
| | | | | | | | vector shuffles. Temporarily remove the tests for these operations until the new implementation is working. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79579 91177308-0d34-0410-b5e6-96231b3b80d8
* Use FileCheck even though this means testing for somethingDale Johannesen2009-08-20
| | | | | | | | that has nothing to do with the point of the test, per Chris. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79569 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix an x86 code size regression: prefer RIP-relative addressingDan Gohman2009-08-20
| | | | | | | | | over absolute addressing even in non-PIC mode (unless the address has an index or something else incompatible), because it has a smaller encoding. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79553 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix an obvious copy-n-paste bug.Evan Cheng2009-08-20
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79535 91177308-0d34-0410-b5e6-96231b3b80d8
* Use FileCheck for the test run where it's appropriate.Dale Johannesen2009-08-20
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79534 91177308-0d34-0410-b5e6-96231b3b80d8
* Handle 'a' modifier in X86 asms. PR 4742.Dale Johannesen2009-08-19
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79484 91177308-0d34-0410-b5e6-96231b3b80d8
* Make this test platform neutral.Bill Wendling2009-08-19
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79447 91177308-0d34-0410-b5e6-96231b3b80d8
* Add an x86 peep that narrows TEST instructions to forms that useDan Gohman2009-08-19
| | | | | | | | a smaller encoding. These kinds of patterns are very frequent in sqlite3, for example. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79439 91177308-0d34-0410-b5e6-96231b3b80d8
* Add support for Neon VEXT (vector extract) shuffles.Bob Wilson2009-08-19
| | | | | | | | | This is derived from a patch by Anton Korzh. I modified it to recognize the VEXT shuffles during legalization and lower them to a target-specific DAG node. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79428 91177308-0d34-0410-b5e6-96231b3b80d8
* PR4737: Fix a nasty bug in load narrowing with non-power-of-two types.Eli Friedman2009-08-19
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79415 91177308-0d34-0410-b5e6-96231b3b80d8
* Legalize the shift amount operand of SRL_PARTS, SHL_PARTS, andDan Gohman2009-08-18
| | | | | | | SRA_PARTS, as is done for SRL, SHL, and SRA. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79380 91177308-0d34-0410-b5e6-96231b3b80d8
* Add support for mergeable sections back into the XCore backend.Richard Osborne2009-08-18
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79368 91177308-0d34-0410-b5e6-96231b3b80d8
* Put data with relocations in the same sections as data without relocations.Richard Osborne2009-08-18
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79351 91177308-0d34-0410-b5e6-96231b3b80d8
* Make this test less sensitive to assembler differences.Dan Gohman2009-08-18
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79348 91177308-0d34-0410-b5e6-96231b3b80d8
* force a triple so this passes on darwinChris Lattner2009-08-18
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79345 91177308-0d34-0410-b5e6-96231b3b80d8
* Make tail merging handle blocks with repeated predecessors correctly, andDan Gohman2009-08-18
| | | | | | | | | | | | | | | | | | | | | remove RemoveDuplicateSuccessor, as it is no longer necessary, and because it breaks assumptions made in MachineBasicBlock::isOnlyReachableByFallthrough. Convert test/CodeGen/X86/omit-label.ll to FileCheck and add a testcase for PR4732. test/CodeGen/Thumb2/thumb2-ifcvt2.ll sees a diff with this commit due to it being bugpoint-reduced to the point where it doesn't matter what the condition for the branch is. Add some more interesting code to test/CodeGen/X86/2009-08-06-branchfolder-crash.ll, which is the testcase that originally motivated the RemoveDuplicateSuccessor code, to help verify that the original problem isn't being re-broken. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79338 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix revsh pattern.Evan Cheng2009-08-18
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79318 91177308-0d34-0410-b5e6-96231b3b80d8
* PowerPC inline asm was emitting two output operandsDale Johannesen2009-08-18
| | | | | | | | | | | for a single "m" constraint; this is wrong because the opcode of a load or store would have to change in parallel. This patch makes it always compute addresses into a register, which is correct but not as efficient as possible. 7144566. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79292 91177308-0d34-0410-b5e6-96231b3b80d8
* Update getSectionForConstant() to to allow mergable sections to be nulled outRichard Osborne2009-08-17
| | | | | | | if not supported by the ELF subtarget. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79249 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix test on Linux.Eli Friedman2009-08-15
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79140 91177308-0d34-0410-b5e6-96231b3b80d8
* Reapply r79127. It was fixed by d0k.Bill Wendling2009-08-15
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79136 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert r79127. It was causing compilation errors.Bill Wendling2009-08-15
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79135 91177308-0d34-0410-b5e6-96231b3b80d8
* Change allowsUnalignedMemoryAccesses to take type argument since some targetsEvan Cheng2009-08-15
| | | | | | | | | | | support unaligned mem access only for certain types. (Should it be size instead?) ARM v7 supports unaligned access for i16 and i32, some v6 variants support it as well. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79127 91177308-0d34-0410-b5e6-96231b3b80d8
* implement support for CHECK-NEXT: in filecheck.Chris Lattner2009-08-15
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79123 91177308-0d34-0410-b5e6-96231b3b80d8
* Refine EarlyClobber assert in register scavenger.Jakob Stoklund Olesen2009-08-15
| | | | | | | | | | | | | | It is legal for an inline asm operand to use an earlyclobber register if the use operand is tied to the earlyclobber operand. The issue is discussed here: http://gcc.gnu.org/ml/gcc/1999-04n/msg00431.html We should perhaps let only the machine code verifier worry about these finer details. EarlyClobber operands are not really interesting to the scavenger. This fixes PR4528 for the third time. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79122 91177308-0d34-0410-b5e6-96231b3b80d8
* specify a target triple so global variable manglings are consistent etc.Chris Lattner2009-08-15
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79118 91177308-0d34-0410-b5e6-96231b3b80d8
* convert to filecheck.Chris Lattner2009-08-15
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79117 91177308-0d34-0410-b5e6-96231b3b80d8
* rename this test to sse2.llChris Lattner2009-08-15
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79116 91177308-0d34-0410-b5e6-96231b3b80d8
* merge a bunch more sse3 tests into sse3.llChris Lattner2009-08-15
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79115 91177308-0d34-0410-b5e6-96231b3b80d8
* convert test to filecheck format.Chris Lattner2009-08-15
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79114 91177308-0d34-0410-b5e6-96231b3b80d8
* rename testChris Lattner2009-08-15
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79113 91177308-0d34-0410-b5e6-96231b3b80d8
* this is a test for sse3, simplify it.Chris Lattner2009-08-15
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79112 91177308-0d34-0410-b5e6-96231b3b80d8
* Don't setCalleeSavedInfoValid() until spills are interted.Jakob Stoklund Olesen2009-08-15
| | | | | | | | | | In a naked function, the flag is never set and getPristineRegs() returns an empty list. That means naked functions are able to clobber callee saved registers, but that is the whole point of naked functions. This fixes PR4716. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79096 91177308-0d34-0410-b5e6-96231b3b80d8
* Add XFAIL testcase for setcc undef.Jakob Stoklund Olesen2009-08-15
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79093 91177308-0d34-0410-b5e6-96231b3b80d8
* Add XFAIL test case for a scavenger assert.Jakob Stoklund Olesen2009-08-15
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79092 91177308-0d34-0410-b5e6-96231b3b80d8
* Update LocalRewriter::DistanceMap when inserting stack loads.Jakob Stoklund Olesen2009-08-15
| | | | | | | | In the included test case, a stack load was not included in DistanceMap. That caused TransferDeadness to ignore the instruction, leading to a scavenger assert. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79090 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix tests.Evan Cheng2009-08-15
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79086 91177308-0d34-0410-b5e6-96231b3b80d8
* Turn on if-conversion for thumb2.Evan Cheng2009-08-15
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79084 91177308-0d34-0410-b5e6-96231b3b80d8
* use XCore-specific section with xcore specific cp/dp flags to restore Chris Lattner2009-08-15
| | | | | | | | | support for globals going into the appropriate sections with the flags. This hopefully finishes unbreaking the previous behavior that I broke before. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79079 91177308-0d34-0410-b5e6-96231b3b80d8
* On x86-64, for a varargs function, don't store the xmm registers toDan Gohman2009-08-15
| | | | | | | | the register save area if %al is 0. This avoids touching xmm regsiters when they aren't actually used. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79061 91177308-0d34-0410-b5e6-96231b3b80d8
* Leaf functions which do not save CSRs can be frameless even with ↵Evan Cheng2009-08-14
| | | | | | -disable-fp-elim. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79039 91177308-0d34-0410-b5e6-96231b3b80d8
* Also shrink immediate branches; also more assembler workarounds.Evan Cheng2009-08-14
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79014 91177308-0d34-0410-b5e6-96231b3b80d8
* Properly handle indirect win64 args when they're passed in memoryAnton Korobeynikov2009-08-14
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79009 91177308-0d34-0410-b5e6-96231b3b80d8
* Shrink ADR and LDR from constantpool late during constantpool island pass.Evan Cheng2009-08-14
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78970 91177308-0d34-0410-b5e6-96231b3b80d8
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