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* [mips] Use multiple FileCheck prefixes rather than run the test multiple timesDaniel Sanders2014-02-19
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201695 91177308-0d34-0410-b5e6-96231b3b80d8
* [Sparc] Remove spurious checks from a testcase.Venkatraman Govindaraju2014-02-19
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201690 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix AVX512 vector sqrt assembly strings.Cameron McInally2014-02-19
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201681 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert r201622 and r201608.Daniel Jasper2014-02-19
| | | | | | | This causes the LLVMgold plugin to segfault. More information on the replies to r201608. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201669 91177308-0d34-0410-b5e6-96231b3b80d8
* Avoid an infinite cycle with private linkage and -f{data|function}-sections.Rafael Espindola2014-02-19
| | | | | | | | | | When outputting an object we check its section to find its name, but when looking for the section with -ffunction-section we look for the symbol name. Break the loop by requesting a name with the private prefix when constructing the section name. This matches the behavior before r201608. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201622 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix PR18743.Rafael Espindola2014-02-18
| | | | | | | | | | | | | | | | | | | | | | | | The IR @foo = private constant i32 42 is valid, but before this patch we would produce an invalid MachO from it. It was invalid because it would use an L label in a section where the liker needs the labels in order to atomize it. One way of fixing it would be to just reject this IR in the backend, but that would not be very front end friendly. What this patch does is use an 'l' prefix in sections that we know the linker requires symbols for atomizing them. This allows frontends to just use private and not worry about which sections they go to or how the linker handles them. One small issue with this strategy is that now a symbol name depends on the section, which is not available before codegen. This is not a problem in practice. The reason is that it only happens with private linkage, which will be ignored by the non codegen users (llvm-nm and llvm-ar). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201608 91177308-0d34-0410-b5e6-96231b3b80d8
* [AArch64] Expanded sin, cos, pow with FP vector types inputsAna Pazos2014-02-18
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201601 91177308-0d34-0410-b5e6-96231b3b80d8
* XCore target: Handle common linkageRobert Lytton2014-02-18
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201563 91177308-0d34-0410-b5e6-96231b3b80d8
* XCore target: Fix llvm.eh.return and EH info register handlingRobert Lytton2014-02-18
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201561 91177308-0d34-0410-b5e6-96231b3b80d8
* X86: use vpsllvd (& friends) for 16-bit shifts on HaswellTim Northover2014-02-18
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201558 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix a typo about lowering AArch64 va_copy.Jiangning Liu2014-02-18
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201541 91177308-0d34-0410-b5e6-96231b3b80d8
* AVX-512: implemented zext fron i1 to i16Elena Demikhovsky2014-02-17
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201502 91177308-0d34-0410-b5e6-96231b3b80d8
* Use 16 byte stack alignment for NaCl on ARMMark Seaborn2014-02-16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | NaCl's ARM ABI uses 16 byte stack alignment, so set that in ARMSubtarget.cpp. Using 16 byte alignment exposes an issue in code generation in which a varargs function leaves a 4 byte gap between the values of r1-r3 saved to the stack and the following arguments that were passed on the stack. (Previously, this code only needed to support 4 byte and 8 byte alignment.) With this issue, llc generated: varargs_func: sub sp, sp, #16 push {lr} sub sp, sp, #12 add r0, sp, #16 // Should be 20 stm r0, {r1, r2, r3} ldr r0, .LCPI0_0 // Address of va_list add r1, sp, #16 str r1, [r0] bl external_func Fix the bug by checking for "Align > 4". Also simplify the code by using OffsetToAlignment(), and update comments. Differential Revision: http://llvm-reviews.chandlerc.com/D2677 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201497 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix more broken CHECK linesNico Rieck2014-02-16
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201493 91177308-0d34-0410-b5e6-96231b3b80d8
* Add extra CHECK prefix to tests with explicit prefixNico Rieck2014-02-16
| | | | | | | These tests mistakenly assume that CHECK is still available even if an explicit prefix is specified. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201492 91177308-0d34-0410-b5e6-96231b3b80d8
* Actually call FileCheck in testsNico Rieck2014-02-16
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201491 91177308-0d34-0410-b5e6-96231b3b80d8
* AVX-512: simpyfied BUILD_VECTOR for masks; fixed cmp/test sequenceElena Demikhovsky2014-02-16
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201487 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix broken CHECK linesNico Rieck2014-02-16
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201479 91177308-0d34-0410-b5e6-96231b3b80d8
* [CodeGenPrepare][AddressingModeMatcher] Give up on type promotion if theQuentin Colombet2014-02-14
| | | | | | | | transformation does not bring any immediate benefits and introduce an illegal operation. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201439 91177308-0d34-0410-b5e6-96231b3b80d8
* TargetLowering: n * r where n > 2 should be an illegal addressing modeTom Stellard2014-02-14
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201433 91177308-0d34-0410-b5e6-96231b3b80d8
* This patch has two main functions:Reed Kotler2014-02-14
| | | | | | | | | | | | | | | | | | | 1) Fix a specific bug when certain conversion functions are called in a program compiled as mips16 with hard float and the program is linked as c++. There are two libraries that are reversed in the link order with gcc/g++ and clang/clang++ for mips16 in this case and the proper stubs will then not be called. These stubs are normally handled in the Mips16HardFloat pass but in this case we don't know at that time that we need to generate the stubs. This must all be handled later in code generation and we have moved this functionality to MipsAsmPrinter. When linked as C (gcc or clang) the proper stubs are linked in from libc. 2) Set up the infrastructure to handle 90% of what is in the Mips16HardFloat pass in this new area of MipsAsmPrinter. This is a more logical place to handle this and we have known for some time that we needed to move the code later and not implement it using inline asm as we do now but it was not clear exactly where to do this and what mechanism should be used. Now it's clear to us how to do this and this patch contains the infrastructure to move most of this to MipsAsmPrinter but the actual moving will be done in a follow on patch. The same infrastructure is used to fix this current bug as described in #1. This change was requested by the list during the original putback of the Mips16HardFloat pass but was not practical for us do at that time. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201426 91177308-0d34-0410-b5e6-96231b3b80d8
* Generate the DWARF stack frame decode operations in the function prologue ↵Artyom Skrobov2014-02-14
| | | | | | | | | | for ARM/Thumb functions. Patch by Keith Walker! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201423 91177308-0d34-0410-b5e6-96231b3b80d8
* [AArch64 NEON] Fix a bug to avoid using floating type as condition type in ↵Kevin Qin2014-02-14
| | | | | | lowering SELECT_CC. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201395 91177308-0d34-0410-b5e6-96231b3b80d8
* [AArch64]Fix the assertion failure caused by "v1i1 SETCC" DAG node.Hao Liu2014-02-14
| | | | | | | As v1i1 is illegal, the type legalizer tries to scalarize such node. But if the type operands of SETCC is legal, the scalarization algorithm will cause an assertion failure. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201381 91177308-0d34-0410-b5e6-96231b3b80d8
* R600/SI: Expand all v8[if]32 operationsTom Stellard2014-02-13
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201371 91177308-0d34-0410-b5e6-96231b3b80d8
* R600/SI: Add a pattern for i32 anyextTom Stellard2014-02-13
| | | | | | Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201370 91177308-0d34-0410-b5e6-96231b3b80d8
* R600/SI: Completely Disable TypeRewriter on computeTom Stellard2014-02-13
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201369 91177308-0d34-0410-b5e6-96231b3b80d8
* R600/SI: Split global vector loads with more than 4 elementsTom Stellard2014-02-13
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201368 91177308-0d34-0410-b5e6-96231b3b80d8
* R600/SI: Add ShaderType attribute to some testsTom Stellard2014-02-13
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201367 91177308-0d34-0410-b5e6-96231b3b80d8
* Use __literal16. It has been supported by the linker since 2005.Rafael Espindola2014-02-13
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201365 91177308-0d34-0410-b5e6-96231b3b80d8
* Add triples to try to fix the windows bots.Rafael Espindola2014-02-13
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201345 91177308-0d34-0410-b5e6-96231b3b80d8
* .file is only available on ELF, use a triple instead of -march.Rafael Espindola2014-02-13
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201337 91177308-0d34-0410-b5e6-96231b3b80d8
* "foo" is not a ppc instruction, don't try to parse it.Rafael Espindola2014-02-13
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201336 91177308-0d34-0410-b5e6-96231b3b80d8
* Specify a triple. MachO AArch64 support is missing.Rafael Espindola2014-02-13
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201335 91177308-0d34-0410-b5e6-96231b3b80d8
* Re-commit: Demote EmitRawText call in AsmPrinter::EmitInlineAsm() and remove ↵Daniel Sanders2014-02-13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | hasRawTextSupport() call Summary: AsmPrinter::EmitInlineAsm() will no longer use the EmitRawText() call for targets with mature MC support. Such targets will always parse the inline assembly (even when emitting assembly). Targets without mature MC support continue to use EmitRawText() for assembly output. The hasRawTextSupport() check in AsmPrinter::EmitInlineAsm() has been replaced with MCAsmInfo::UseIntegratedAs which when true, causes the integrated assembler to parse inline assembly (even when emitting assembly output). UseIntegratedAs is set to true for targets that consider any failure to parse valid assembly to be a bug. Target specific subclasses generally enable the integrated assembler in their constructor. The default value can be overridden with -no-integrated-as. All tests that rely on inline assembly supporting invalid assembly (for example, those that use mnemonics such as 'foo' or 'hello world') have been updated to disable the integrated assembler. Changes since review (and last commit attempt): - Fixed test failures that were missed due to configuration of local build. (fixes crash.ll and a couple others). - Fixed tests that happened to pass because the local build was on X86 (should fix 2007-12-17-InvokeAsm.ll) - mature-mc-support.ll's should no longer require all targets to be compiled. (should fix ARM and PPC buildbots) - Object output (-filetype=obj and similar) now forces the integrated assembler to be enabled regardless of default setting or -no-integrated-as. (should fix SystemZ buildbots) Reviewers: rafael Reviewed By: rafael CC: llvm-commits Differential Revision: http://llvm-reviews.chandlerc.com/D2686 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201333 91177308-0d34-0410-b5e6-96231b3b80d8
* llvm/test/CodeGen/AArch64/cpus.ll: Tweak to use ↵NAKAMURA Takumi2014-02-13
| | | | | | -mtriple=aarch64-unknown-unknown, or this would crash for targeting pecoff like *-mingw32. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201315 91177308-0d34-0410-b5e6-96231b3b80d8
* ARM: remove floating-point patterns for @llvm.arm.neon.vabsTim Northover2014-02-13
| | | | | | | The front-end is now generating the generic @llvm.fabs for this operation now, so the extra patterns are no longer needed. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201314 91177308-0d34-0410-b5e6-96231b3b80d8
* Add Cortex-A53 and Cortex-A57 cores to the AArch64 backendOliver Stannard2014-02-13
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201305 91177308-0d34-0410-b5e6-96231b3b80d8
* [AArch64]Fix the problems that can't select mul/add/sub of v1i8/v1i16/v1i32 ↵Hao Liu2014-02-13
| | | | | | | | | types. As this problems are similar to shl/sra/srl, also add patterns for shift nodes. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201298 91177308-0d34-0410-b5e6-96231b3b80d8
* [DAG] Fix the recognition of opaque constants in the SelectionDAGBuilder.Juergen Ributzka2014-02-13
| | | | | | | | | | | This fix checks the original LLVM IR node to identify opaque constants by looking for the bitcast-constant pattern. Originally we looked at the generated SDNode, but this might lead to incorrect results. The SDNode could have been generated by an constant expression that was folded to a constant. This fixes <rdar://problem/16050719> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201291 91177308-0d34-0410-b5e6-96231b3b80d8
* [AArch64]Add support for spilling FPR8/FPR16.Hao Liu2014-02-13
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201287 91177308-0d34-0410-b5e6-96231b3b80d8
* [X86] Teach the backend how to lower vector shift left into multiply rather ↵Andrea Di Biagio2014-02-12
| | | | | | | | | | | | | | | | | | | | | | | | | | | than scalarizing it. Instead of expanding a packed shift into a sequence of scalar shifts, the backend now tries (when possible) to convert the vector shift into a vector multiply. Before this change, a shift of a MVT::v8i16 vector by a build_vector of constants was always scalarized into a long sequence of "vector extracts + scalar shifts + vector insert". With this change, if there is SSE2 support, we emit a single vector multiply. This change also affects SSE4.1, AVX, AVX2 shifts: - A shift of a MVT::v4i32 vector by a build_vector of non uniform constants is now lowered when possible into a single SSE4.1 vector multiply. - Packed v16i16 shift left by constant build_vector are now expanded when possible into a single AVX2 vpmullw. This change also improves the lowering of AVX512f vector shifts. Added test CodeGen/X86/vec_shift6.ll with some code examples that are affected by this change. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201271 91177308-0d34-0410-b5e6-96231b3b80d8
* Pass edges weights to MachineBasicBlock::addSuccessor in TailDuplicatePass toAkira Hatanaka2014-02-12
| | | | | | | | | preserve branch probability information. <rdar://problem/15893208> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201245 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert r201237+r201238: Demote EmitRawText call in ↵Daniel Sanders2014-02-12
| | | | | | | | | AsmPrinter::EmitInlineAsm() and remove hasRawTextSupport() call It introduced multiple test failures in the buildbots. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201241 91177308-0d34-0410-b5e6-96231b3b80d8
* Demote EmitRawText call in AsmPrinter::EmitInlineAsm() and remove ↵Daniel Sanders2014-02-12
| | | | | | | | | | | | | | | | | | | | | hasRawTextSupport() call Summary: AsmPrinter::EmitInlineAsm() will no longer use the EmitRawText() call for targets with mature MC support. Such targets will always parse the inline assembly (even when emitting assembly). Targets without mature MC support continue to use EmitRawText() for assembly output. The hasRawTextSupport() check in AsmPrinter::EmitInlineAsm() has been replaced with MCAsmInfo::UseIntegratedAs which when true, causes the integrated assembler to parse inline assembly (even when emitting assembly output). UseIntegratedAs is set to true for targets that consider any failure to parse valid assembly to be a bug. Target specific subclasses generally enable the integrated assembler in their constructor. The default value can be overridden with -no-integrated-as. All tests that rely on inline assembly supporting invalid assembly (for example, those that use mnemonics such as 'foo' or 'hello world') have been updated to disable the integrated assembler. Reviewers: rafael Reviewed By: rafael CC: llvm-commits Differential Revision: http://llvm-reviews.chandlerc.com/D2686 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201237 91177308-0d34-0410-b5e6-96231b3b80d8
* Tweak ARM fastcc by adopting these two AAPCS rules:Evan Cheng2014-02-11
| | | | | | | | | | | | | | | * CPRCs may be allocated to co-processor registers or the stack – they may never be allocated to core registers * When a CPRC is allocated to the stack, all other VFP registers should be marked as unavailable The difference is only noticeable in rare cases where there are a large number of floating point arguments (e.g. 7 doubles + additional float, double arguments). Although it's probably still better to avoid vmov as it can cause stalls in some older ARM cores. The other, more subtle benefit, is to minimize difference between the various calling conventions. rdar://16039676 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201193 91177308-0d34-0410-b5e6-96231b3b80d8
* DebugInfo: Remove dependence on file numbering in the line table.David Blaikie2014-02-11
| | | | | | | | These tests were unnecessarily sensitive to the presence and ordering of elements in the line table file_names list which will break on a future change I'm working on. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201185 91177308-0d34-0410-b5e6-96231b3b80d8
* R600/SI: Fix assertion on infinite loops.Matt Arsenault2014-02-11
| | | | | | | This isn't the most useful case to fix in the real world, but bugpoint runs into this. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201177 91177308-0d34-0410-b5e6-96231b3b80d8
* Teach the DAGCombiner how to fold concat_vector nodes when the input is twoRobert Lougher2014-02-11
| | | | | | | | | | | | | | | BUILD_VECTOR nodes, e.g.: (concat_vectors (BUILD_VECTOR a1, a2, a3, a4), (BUILD_VECTOR b1, b2, b3, b4)) -> (BUILD_VECTOR a1, a2, a3, a4, b1, b2, b3, b4) This fixes an issue with AVX, where a sequence was not recognized as a 256-bit vbroadcast due to the concat_vectors. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201158 91177308-0d34-0410-b5e6-96231b3b80d8
* XCore target: fix const section handlingRobert Lytton2014-02-11
| | | | | | | | | | | | Xcore target ABI requires const data that is externally visible to be handled differently if it has C-language linkage rather than C++ language linkage. Clang now emits ".cp.rodata" section information. All other externally visible constant data will be placed in the DP section. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201144 91177308-0d34-0410-b5e6-96231b3b80d8
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