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* Don't let x86 asm printer use the no operand movsd alias. It should use the ↵Craig Topper2013-07-23
| | | | | | normal movsl instead. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186924 91177308-0d34-0410-b5e6-96231b3b80d8
* Add retw and lretw instructions. Also, fix Intel syntax parsing for allCharles Davis2012-04-11
| | | | | | | ret instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154468 91177308-0d34-0410-b5e6-96231b3b80d8
* Updated the llvm-mc disassembler C API to support for the X86 target.Kevin Enderby2012-02-23
| | | | | | | | | | | | | | | | | | | | | | rdar://10873652 As part of this I updated the llvm-mc disassembler C API to always call the SymbolLookUp call back even if there is no getOpInfo call back. If there is a getOpInfo call back that is tried first and then if that gets no information then the SymbolLookUp is called. I also made the code more robust by memset(3)'ing to zero the LLVMOpInfo1 struct before then setting SymbolicOp.Value before for the call to getOpInfo. And also don't use any values from the LLVMOpInfo1 struct if getOpInfo returns 0. And also don't use any of the ReferenceType or ReferenceName values from SymbolLookUp if it returns NULL. rdar://10873563 and rdar://10873683 For the X86 target also fixed bugs so the annotations get printed. Also fixed a few places in the ARM target that was not producing symbolic operands for some instructions. rdar://10878166 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151267 91177308-0d34-0410-b5e6-96231b3b80d8
* Add vmfunc instruction to X86 assembler and disassembler.Craig Topper2012-02-19
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150899 91177308-0d34-0410-b5e6-96231b3b80d8
* Add X86 assembler and disassembler support for AMD SVM instructions. ↵Craig Topper2012-02-18
| | | | | | Original patch by Kay Tiong Khoo. Few tweaks by me for code density and to reduce replication. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150873 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert part of r141274. Only need to change encoding for xchg %eax, %eax in ↵Craig Topper2011-10-07
| | | | | | 64-bit mode. This is because in 64-bit mode xchg %eax, %eax implies zeroing the upper 32-bits of RAX which makes it not a NOP. In 32-bit mode using NOP encoding is fine. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141353 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix assembling of xchg %eax, %eax to not use the NOP encoding of 0x90. This ↵Craig Topper2011-10-06
| | | | | | was done by creating a new register group that excludes AX registers. Fixes PR10345. Also added aliases for flipping the order of the operands of xchg <reg>, %eax. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141274 91177308-0d34-0410-b5e6-96231b3b80d8
* add test from PR9164Chris Lattner2011-05-22
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131876 91177308-0d34-0410-b5e6-96231b3b80d8
* testcase for PR9378Chris Lattner2011-05-22
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131875 91177308-0d34-0410-b5e6-96231b3b80d8
* Have the X86 back-end emit the alias instead of what's being aliased. In mostBill Wendling2011-04-14
| | | | | | | cases, it's much nicer and more informative reading the alias. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129497 91177308-0d34-0410-b5e6-96231b3b80d8
* Support explicit argument forms for the X86 string instructions.Joerg Sonnenberger2011-03-18
| | | | | | | For now, only the default segments are supported. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127875 91177308-0d34-0410-b5e6-96231b3b80d8
* PR9377: Handle x86 str with register operand in a way consistent with gas.Eli Friedman2011-03-04
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126970 91177308-0d34-0410-b5e6-96231b3b80d8
* Recognize loopz and loopnz as aliases for loope and loopne.Joerg Sonnenberger2011-02-22
| | | | | | | From Dimitry Andric. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126168 91177308-0d34-0410-b5e6-96231b3b80d8
* Recognize monitor/mwait with explicit register argumentsJoerg Sonnenberger2011-02-18
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125805 91177308-0d34-0410-b5e6-96231b3b80d8
* fix PR8686, accepting a 'b' suffix at the end of all the setccChris Lattner2010-11-28
| | | | | | | | | | | instructions. I choose to handle this with an asmparser hack, though it could be handled by changing all the instruction definitions to allow be "setneb" instead of "setne". The asm parser hack is better in this case, because we want the disassembler to produce setne, not setneb. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120260 91177308-0d34-0410-b5e6-96231b3b80d8
* go to great lengths to work around a GAS bug my previous patchChris Lattner2010-11-06
| | | | | | | | | | | | | | | | | exposed: GAS doesn't accept "fcomip %st(1)", it requires "fcomip %st(1), %st(0)" even though st(0) is implicit in all other fp stack instructions. Fortunately, there is an alias for fcomip named "fcompi" and gas does accept the default argument for the alias (boggle!). As such, switch the canonical form of this instruction to "pi" instead of "ip". This makes the code generator and disassembler generate pi, avoiding the gas bug. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118356 91177308-0d34-0410-b5e6-96231b3b80d8
* change the fp comparison instructions to not have %st0 explicitlyChris Lattner2010-11-06
| | | | | | | | | listed in its asm string, for consistency with the other similar instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118354 91177308-0d34-0410-b5e6-96231b3b80d8
* fix an encoding mismatch where "sal %eax, 1" was not using the short encodingChris Lattner2010-10-30
| | | | | | | for shl. Caught by inspection. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117820 91177308-0d34-0410-b5e6-96231b3b80d8
* add a test for the ud2a alias.Chris Lattner2010-10-30
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117803 91177308-0d34-0410-b5e6-96231b3b80d8
* Added the x86 instruction ud2b (2nd official undefined instruction).Kevin Enderby2010-10-27
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117485 91177308-0d34-0410-b5e6-96231b3b80d8
* Yet another tweak to X86 instructions to add ud2a as an alias to ud2Kevin Enderby2010-10-27
| | | | | | | (still to add ud2b). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117435 91177308-0d34-0410-b5e6-96231b3b80d8
* Another tweak to X86 instructions to add the missing flex instruction (withoutKevin Enderby2010-10-27
| | | | | | | the wait prefix). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117434 91177308-0d34-0410-b5e6-96231b3b80d8
* Tweaks to X86 instructions to allow the 'w' suffix in places it makesKevin Enderby2010-10-27
| | | | | | | | | | sense, when the instruction takes the 16-bit ax register or m16 memory location. These changes to llvm-mc matches what the darwin assembler allows for these instructions. Done differently than in r117031 that caused a valgrind error which was later reverted. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117433 91177308-0d34-0410-b5e6-96231b3b80d8
* Added some aliases to the fcomip and fucompi Intel instructions. So that llvm-mcKevin Enderby2010-10-27
| | | | | | | | will accept versions that the darwin assembler allows. Forms ending in "pi" and forms without all the operands. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117427 91177308-0d34-0410-b5e6-96231b3b80d8
* Reverting r117031 to cleanup valgrind errors.Andrew Trick2010-10-22
| | | | | | | | It doesn't look like anything is wrong with the checkin, but the new test cases expose a mem bug in AsmParser. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117087 91177308-0d34-0410-b5e6-96231b3b80d8
* More tweaks to X86 instructions to allow the 'w' suffix in places it makesKevin Enderby2010-10-21
| | | | | | | | | | sense, when the instruction takes the 16-bit ax register or m16 memory location. These changes to llvm-mc matches what the darwin assembler allows for these instructions. Also added the missing flex (without the wait prefix) and ud2a as an alias to ud2 (still to add ud2b). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117031 91177308-0d34-0410-b5e6-96231b3b80d8
* Added a few tweaks to the Intel Descriptor-table support instructions to allowKevin Enderby2010-10-19
| | | | | | | | word forms and suffixed versions to match the darwin assembler in 32-bit and 64-bit modes. This is again for use just with assembly source for llvm-mc . git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116773 91177308-0d34-0410-b5e6-96231b3b80d8
* Added a handful of x86-32 instructions that were missing so that llvm-mc wouldKevin Enderby2010-10-18
| | | | | | | | | | | be more complete. These are only expected to be used by llvm-mc with assembly source so there is no pattern, [], in the .td files. Most are being added to X86InstrInfo.td as Chris suggested and only comments about register uses are added. Suggestions welcome on the .td changes as I'm not sure on every detail of the x86 records. More missing instructions will be coming. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116716 91177308-0d34-0410-b5e6-96231b3b80d8
* the immediate field of pshufw is actually an 8-bit field, not a 8-bit field ↵Chris Lattner2010-10-03
| | | | | | that is sign extended. This fixes PR8288 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115473 91177308-0d34-0410-b5e6-96231b3b80d8
* fix a regression introduced in r115243, in which the instructionChris Lattner2010-10-02
| | | | | | | backing int_x86_ssse3_pshuf_w got removed. This caused PR8280. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115422 91177308-0d34-0410-b5e6-96231b3b80d8
* move X86 subdir up a levelChris Lattner2010-10-01
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115292 91177308-0d34-0410-b5e6-96231b3b80d8
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