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* Change ARM PKHTB and PKHBT instructions to use a shift_imm operand to avoidBob Wilson2010-08-17
| | | | | | | | printing "lsl #0". This fixes the remaining parts of pr7792. Make corresponding changes for encoding/decoding these instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111251 91177308-0d34-0410-b5e6-96231b3b80d8
* Add a Thumb2 t2RSBrr instruction for disassembly only.Bob Wilson2010-08-13
| | | | | | | This fixes another part of PR7792. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111057 91177308-0d34-0410-b5e6-96231b3b80d8
* Move the Thumb2 SSAT and USAT optional shift operator out of theBob Wilson2010-08-13
| | | | | | | instruction opcode. This fixes part of PR7792. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111047 91177308-0d34-0410-b5e6-96231b3b80d8
* Cleaned up the for-disassembly-only entries in the arm instruction table so thatJohnny Chen2010-08-12
| | | | | | | | the memory barrier variants (other than 'SY' full system domain read and write) are treated as one instruction with option operand. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110951 91177308-0d34-0410-b5e6-96231b3b80d8
* The autogened decoder was confusing the ARM STRBT for ARM USAT, because the .tdJohnny Chen2010-08-12
| | | | | | | | | | | entry for ARM STRBT is actually a super-instruction for A8.6.199 STRBT A1 & A2. Recover by looking for ARM:USAT encoding pattern before delegating to the auto- gened decoder. Added a "usat" test case to arm-tests.txt. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110894 91177308-0d34-0410-b5e6-96231b3b80d8
* MC/X86/AsmParser: Give an explicit error message when we reject an instructionDaniel Dunbar2010-08-12
| | | | | | because it could have an ambiguous suffix. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110890 91177308-0d34-0410-b5e6-96231b3b80d8
* Changed the format of DMBsy, DSBsy, and friends from Pseudo to MiscFrm.Johnny Chen2010-08-11
| | | | | | | Added two test cases to arm-tests.txt. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110880 91177308-0d34-0410-b5e6-96231b3b80d8
* Move the ARM SSAT and USAT optional shift amount operand out of theBob Wilson2010-08-11
| | | | | | | instruction opcode. This also fixes part of PR7792. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110875 91177308-0d34-0410-b5e6-96231b3b80d8
* MC/ARM: Add basic support for handling predication by parsing it out of the ↵Daniel Dunbar2010-08-11
| | | | | | mnemonic into a separate operand form. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110794 91177308-0d34-0410-b5e6-96231b3b80d8
* MC/AsmParser: Fix a bug in macro argument parsing, which was droppingDaniel Dunbar2010-08-10
| | | | | | parentheses from argument lists. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110692 91177308-0d34-0410-b5e6-96231b3b80d8
* Add an ARM RSCrr instruction for disassembly only.Bob Wilson2010-08-05
| | | | | | | Partial fix for PR7792. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110361 91177308-0d34-0410-b5e6-96231b3b80d8
* Add an ARM RSBrr instruction for disassembly only.Bob Wilson2010-08-05
| | | | | | | Partial fix for PR7792. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110358 91177308-0d34-0410-b5e6-96231b3b80d8
* tests: Mark MC/AsmParser tests as requiring x86 for now -- almost all of themDaniel Dunbar2010-08-05
| | | | | | rely on using a specific x86 triple to test what they want to test. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110337 91177308-0d34-0410-b5e6-96231b3b80d8
* ARM "rrx" shift operands do not have an immediate. PR7790.Bob Wilson2010-08-05
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110292 91177308-0d34-0410-b5e6-96231b3b80d8
* MC: Fix symbol fragment offsets in COFF.Michael J. Spencer2010-08-03
| | | | | | Patch by Cameron Esfahani! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110104 91177308-0d34-0410-b5e6-96231b3b80d8
* Add support for disassembling VMVN (immediate) instructions. PR7747.Bob Wilson2010-07-31
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109946 91177308-0d34-0410-b5e6-96231b3b80d8
* Make MC use Windows COFF on Windows and add tests.Michael J. Spencer2010-07-27
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109494 91177308-0d34-0410-b5e6-96231b3b80d8
* Support x86 "eiz" and "riz" pseudo index registers in the assembler.Bruno Cardoso Lopes2010-07-24
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109295 91177308-0d34-0410-b5e6-96231b3b80d8
* Consolidate the ELF section directive tests into a single file asMatt Fleming2010-07-23
| | | | | | | | suggested by Chris Lattner. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109290 91177308-0d34-0410-b5e6-96231b3b80d8
* Move AVX encoding tests to different filesBruno Cardoso Lopes2010-07-23
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109269 91177308-0d34-0410-b5e6-96231b3b80d8
* Add AVX version of CLMUL instructionsBruno Cardoso Lopes2010-07-23
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109248 91177308-0d34-0410-b5e6-96231b3b80d8
* Add complete assembler support for FMA3 instructions, with descriptions and ↵Bruno Cardoso Lopes2010-07-23
| | | | | | encodings taken from the AVX manual git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109204 91177308-0d34-0410-b5e6-96231b3b80d8
* Add remaining AVX instructions (most of them dealing with GR64 destinations. ↵Bruno Cardoso Lopes2010-07-22
| | | | | | This complete the assembler support for the general AVX ISA. But we still miss instructions from FMA3 and CLMUL specific feature flags, which are now the next step git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109168 91177308-0d34-0410-b5e6-96231b3b80d8
* Add more 256-bit forms for a bunch of regular AVX instructionsBruno Cardoso Lopes2010-07-21
| | | | | | | | Add 64-bit (GR64) versions of some instructions (which are not described in their SSE forms, but are described in AVX) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109063 91177308-0d34-0410-b5e6-96231b3b80d8
* Add missing AVX convert instructions. Those instructions are not described ↵Bruno Cardoso Lopes2010-07-21
| | | | | | in their SSE forms (although they exist), but add the AVX forms anyway, so the assembler can benefit from it git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109039 91177308-0d34-0410-b5e6-96231b3b80d8
* Add AVX only vzeroall and vzeroupper instructionsBruno Cardoso Lopes2010-07-21
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109002 91177308-0d34-0410-b5e6-96231b3b80d8
* Add new AVX vpermilps, vpermilpd and vperm2f128 instructionsBruno Cardoso Lopes2010-07-21
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108984 91177308-0d34-0410-b5e6-96231b3b80d8
* Add new AVX vmaskmov instructions, and also fix the VEX encoding bits to ↵Bruno Cardoso Lopes2010-07-21
| | | | | | support it git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108983 91177308-0d34-0410-b5e6-96231b3b80d8
* Add new AVX vextractf128 instructionsBruno Cardoso Lopes2010-07-20
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108964 91177308-0d34-0410-b5e6-96231b3b80d8
* Include some tests for the recently committed ELF section directiveMatt Fleming2010-07-20
| | | | | | | | handlers. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108938 91177308-0d34-0410-b5e6-96231b3b80d8
* Add new AVX instruction vinsertf128Bruno Cardoso Lopes2010-07-20
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108892 91177308-0d34-0410-b5e6-96231b3b80d8
* x86_32 tests for vbroadcastBruno Cardoso Lopes2010-07-20
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108789 91177308-0d34-0410-b5e6-96231b3b80d8
* Add AVX vbroadcast new instructionBruno Cardoso Lopes2010-07-20
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108788 91177308-0d34-0410-b5e6-96231b3b80d8
* Add 256-bit vaddsub, vhadd, vhsub, vblend and vdpp instructions!Bruno Cardoso Lopes2010-07-19
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108769 91177308-0d34-0410-b5e6-96231b3b80d8
* X86: Mark JMP{32,64}[mr] as requires 32-bit/64-bit mode. They are the sameDaniel Dunbar2010-07-19
| | | | | | | | instruction, we only want to allow the one for the current subtarget. - This also fixes suffix matching for jmp instructions, because it eliminates the ambiguity between 'jmpl' and 'jmpq'. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108746 91177308-0d34-0410-b5e6-96231b3b80d8
* X86-64: Mark WINCALL and more tail call instructions as code gen only.Daniel Dunbar2010-07-19
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108685 91177308-0d34-0410-b5e6-96231b3b80d8
* MC/X86: We now match instructions like "incl %eax" correctly for the arch we areDaniel Dunbar2010-07-19
| | | | | | assembling; remove crufty custom cleanup code. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108681 91177308-0d34-0410-b5e6-96231b3b80d8
* tests: Force another triple.Daniel Dunbar2010-07-19
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108666 91177308-0d34-0410-b5e6-96231b3b80d8
* tests: Force triples.Daniel Dunbar2010-07-18
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108658 91177308-0d34-0410-b5e6-96231b3b80d8
* MC/AsmParser: Fix .abort and .secure_log_unique to accept arbitrary tokenDaniel Dunbar2010-07-18
| | | | | | sequences, not just strings. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108655 91177308-0d34-0410-b5e6-96231b3b80d8
* MC/AsmParser: Add macro argument substitution support.Daniel Dunbar2010-07-18
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108654 91177308-0d34-0410-b5e6-96231b3b80d8
* MC/AsmParser: Add basic support for macro instantiation.Daniel Dunbar2010-07-18
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108653 91177308-0d34-0410-b5e6-96231b3b80d8
* MC/AsmParser: Add basic parsing support for .macro definitions.Daniel Dunbar2010-07-18
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108652 91177308-0d34-0410-b5e6-96231b3b80d8
* MC/AsmParser: Add .macros_{off,on} support, not that makes sense since we don'tDaniel Dunbar2010-07-18
| | | | | | support macros. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108649 91177308-0d34-0410-b5e6-96231b3b80d8
* Test for ELF .size directive.Eli Friedman2010-07-17
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108607 91177308-0d34-0410-b5e6-96231b3b80d8
* Add AVX 256-bit compare instructions and a bunch of testcasesBruno Cardoso Lopes2010-07-13
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108286 91177308-0d34-0410-b5e6-96231b3b80d8
* AVX 256-bit conversion instructionsBruno Cardoso Lopes2010-07-13
| | | | | | | Add the x86 VEX_L form to handle special cases where VEX_L must be set. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108274 91177308-0d34-0410-b5e6-96231b3b80d8
* my work on adding segment registers to LEA missed the Chris Lattner2010-07-13
| | | | | | | | disassembler. Remove some code from the disassembler to compensate, unbreaking disassembly of lea's. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108226 91177308-0d34-0410-b5e6-96231b3b80d8
* Add AVX 256-bit packed logical formsBruno Cardoso Lopes2010-07-13
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108224 91177308-0d34-0410-b5e6-96231b3b80d8
* Add AVX 256-bit unop arithmetic instructionsBruno Cardoso Lopes2010-07-13
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108223 91177308-0d34-0410-b5e6-96231b3b80d8
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