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* PR15662: Optimized debug info produces out of order function parametersTom Stellard2013-07-19
| | | | | | | | | | | | | | | | | | | When a function is inlined we lazily construct the variables representing the function's parameters. After that, we add any remaining unused parameters. If the function doesn't use all the parameters, or uses them out of order, then the DWARF would produce them in that order, producing a parameter order that doesn't match the source. This fix causes us to always keep the arg variables at the start of the variable list & in the original order from the source. Merged from r183297 Author: David Blaikie <dblaikie@gmail.com> Date: Wed Jun 5 05:39:59 2013 +0000 git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_33@186678 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix for a regression caused by the LoopVectorizer whenTom Stellard2013-07-08
| | | | | | | | | | | | vectorizing loops with memory accesses to non-zero address spaces. It simply dropped the AS info. Fixes PR16306. Merged from r184103 Author: Pekka Jaaskelainen <pekka.jaaskelainen@tut.fi> Date: Mon Jun 17 18:49:06 2013 +0000 git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_33@185869 91177308-0d34-0410-b5e6-96231b3b80d8
* R600: Fix R600ControlFlowFinalizer not considering VTX_READ 128 bit dst regTom Stellard2013-07-08
| | | | | | | | | | | | | | | Patch by: Vincent Lejeune https://bugs.freedesktop.org/show_bug.cgi?id=64877 NOTE: This is a candidate for the 3.3 branch. Merged from r182600 Author: Tom Stellard <thomas.stellard@amd.com> Date: Thu May 23 18:26:42 2013 +0000 git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_33@185868 91177308-0d34-0410-b5e6-96231b3b80d8
* Merging r183035:Bill Wendling2013-06-04
| | | | | | | | | | | | | | | | | ------------------------------------------------------------------------ r183035 | arnolds | 2013-05-31 12:53:50 -0700 (Fri, 31 May 2013) | 7 lines LoopVectorize: PHIs with only outside users should prevent vectorization We check that instructions in the loop don't have outside users (except if they are reduction values). Unfortunately, we skipped this check for if-convertable PHIs. Fixes PR16184. ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_33@183189 91177308-0d34-0410-b5e6-96231b3b80d8
* Merge 183060: Prevent loop-unroll from making assumptions about undefined ↵Andrew Trick2013-06-01
| | | | | | | | | | | | | | | | | | | behavior. Fixes rdar:14036816, PR16130. There is an opportunity to compute precise trip counts for 'or' expressions and multi-exit loops. rdar:14038809: Optimize trip count computation for multi-exit loops. To do this we need to record the fact that ExitLimit assumes NSW. When it does not we can safely assume that the loop trip count is the minimum ExitLimt across all subexpressions and loop exits. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183060 91177308-0d34-0410-b5e6-96231b3b80d8 git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_33@183066 91177308-0d34-0410-b5e6-96231b3b80d8
* Merging r182394:Bill Wendling2013-05-29
| | | | | | | | | | | ------------------------------------------------------------------------ r182394 | jholewinski | 2013-05-21 09:51:30 -0700 (Tue, 21 May 2013) | 1 line [NVPTX] Add @llvm.nvvm.sqrt.f() intrinsic ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_33@182829 91177308-0d34-0410-b5e6-96231b3b80d8
* Merging r182298:Bill Wendling2013-05-29
| | | | | | | | | | | ------------------------------------------------------------------------ r182298 | jholewinski | 2013-05-20 09:42:18 -0700 (Mon, 20 May 2013) | 1 line [NVPTX] Fix mis-use of CurrentFnSym in NVPTXAsmPrinter. This was causing a symbol name error in the output PTX. ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_33@182828 91177308-0d34-0410-b5e6-96231b3b80d8
* Merging r182254:Bill Wendling2013-05-29
| | | | | | | | | | | | | | | | | | | | | | ------------------------------------------------------------------------ r182254 | jholewinski | 2013-05-20 05:13:32 -0700 (Mon, 20 May 2013) | 12 lines [NVPTX] Add GenericToNVVM IR converter to better handle idiomatic LLVM IR inputs This converter currently only handles global variables in address space 0. For these variables, they are promoted to address space 1 (global memory), and all uses are updated to point to the result of a cvta.global instruction on the new variable. The motivation for this is address space 0 global variables are illegal since we cannot declare variables in the generic address space. Instead, we place the variables in address space 1 and explicitly convert the pointer to address space 0. This is primarily intended to help new users who expect to be able to place global variables in the default address space. ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_33@182826 91177308-0d34-0410-b5e6-96231b3b80d8
* Merging r182253:Bill Wendling2013-05-29
| | | | | | | | | | | ------------------------------------------------------------------------ r182253 | jholewinski | 2013-05-20 05:13:28 -0700 (Mon, 20 May 2013) | 1 line [NVPTX] Fix i1 kernel parameters and global variables. ABI rules say we need to use .u8 for i1 parameters for kernels. ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_33@182825 91177308-0d34-0410-b5e6-96231b3b80d8
* Merging r182656:Bill Wendling2013-05-28
| | | | | | | | | | | | | ------------------------------------------------------------------------ r182656 | d0k | 2013-05-24 11:05:35 -0700 (Fri, 24 May 2013) | 3 lines LoopVectorize: LoopSimplify can't canonicalize loops with an indirectbr in it, don't assert on those cases. Fixes PR16139. ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_33@182785 91177308-0d34-0410-b5e6-96231b3b80d8
* Merging r182485:Bill Wendling2013-05-22
| | | | | | | | | | | | | | | | | ------------------------------------------------------------------------ r182485 | arnolds | 2013-05-22 09:54:56 -0700 (Wed, 22 May 2013) | 7 lines LoopVectorize: Make Value pointers that could be RAUW'ed a VH The Value pointers we store in the induction variable list can be RAUW'ed by a call to SCEVExpander::expandCodeFor, use a TrackingVH instead. Do the same thing in some other places where we store pointers that could potentially be RAUW'ed. Fixes PR16073. ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_33@182492 91177308-0d34-0410-b5e6-96231b3b80d8
* Merging r182486:Bill Wendling2013-05-22
| | | | | | | | | | | | | ------------------------------------------------------------------------ r182486 | d0k | 2013-05-22 10:01:12 -0700 (Wed, 22 May 2013) | 3 lines X86: When expanding PCMPGTQ to PCMPGTD we always want to compare the lower halves as unsigned. Take #2 on fixing PR15977. ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_33@182489 91177308-0d34-0410-b5e6-96231b3b80d8
* Merging r181366:Bill Wendling2013-05-21
| | | | | | | | | | | | | | | | ------------------------------------------------------------------------ r181366 | enderby | 2013-05-07 14:40:58 -0700 (Tue, 07 May 2013) | 6 lines Fix a bug in the MC asm parser evaluating expressions. It was treating: A = 9 B = 3 * A - 2 * A + 1 as B = 3 * A - (2 * A + 1) rdar://13816516 ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_33@182438 91177308-0d34-0410-b5e6-96231b3b80d8
* Merging r182387:Bill Wendling2013-05-21
| | | | | | | | | | | | | | | | | ------------------------------------------------------------------------ r182387 | jholewinski | 2013-05-21 07:37:16 -0700 (Tue, 21 May 2013) | 7 lines Drop @llvm.annotation and @llvm.ptr.annotation intrinsics during codegen. The intrinsic calls are dropped, but the annotated value is propagated. Fixes PR 15253 Original patch by Zeng Bin! ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_33@182417 91177308-0d34-0410-b5e6-96231b3b80d8
* Merging r182364:Bill Wendling2013-05-21
| | | | | | | | | | | | | | ------------------------------------------------------------------------ r182364 | d0k | 2013-05-21 02:58:54 -0700 (Tue, 21 May 2013) | 4 lines X86: When emulating unsigned PCMPGTQ with PCMPGTD, fix the sign bit for the smaller type. Otherwise we'll get a mix of signed and unsigned compares. Fixes PR15977. ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_33@182413 91177308-0d34-0410-b5e6-96231b3b80d8
* Merging r182344:Bill Wendling2013-05-21
| | | | | | | | | | | | | | | | | ------------------------------------------------------------------------ r182344 | mren | 2013-05-20 17:57:22 -0700 (Mon, 20 May 2013) | 7 lines Dwarf: use a single line table to generate assembly when .loc is used. This is to fix PR15408 where an undefined symbol Lline_table_start1 is used. Since we do not generate the debug_line section when .loc is used, Lline_table_start1 is not emitted and we can't refer to it when calculating at_stmt_list for a compile unit. ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_33@182346 91177308-0d34-0410-b5e6-96231b3b80d8
* Merging r182113:Bill Wendling2013-05-17
| | | | | | | | | | | | | | | | | | | ------------------------------------------------------------------------ r182113 | tstellar | 2013-05-17 08:23:21 -0700 (Fri, 17 May 2013) | 9 lines R600: Fix encoding for R600 family GPUs Reviewed-by: Vincent Lejeune <vljn@ovi.com> https://bugs.freedesktop.org/show_bug.cgi?id=64193 https://bugs.freedesktop.org/show_bug.cgi?id=64257 https://bugs.freedesktop.org/show_bug.cgi?id=64320 NOTE: This is a candidate for the 3.3 branch. ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_33@182174 91177308-0d34-0410-b5e6-96231b3b80d8
* Merging r181678:Bill Wendling2013-05-17
| | | | | | | | | | | ------------------------------------------------------------------------ r181678 | rafael | 2013-05-12 17:18:24 -0700 (Sun, 12 May 2013) | 1 line XFAIL this test for mingw too. ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_33@182146 91177308-0d34-0410-b5e6-96231b3b80d8
* Merging r181600:Bill Wendling2013-05-17
| | | | | | | | | | | ------------------------------------------------------------------------ r181600 | aaronballman | 2013-05-10 07:42:16 -0700 (Fri, 10 May 2013) | 1 line XFAILing this test on Win32 to unbreak the build bots. ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_33@182145 91177308-0d34-0410-b5e6-96231b3b80d8
* Merging r181540:Bill Wendling2013-05-16
| | | | | | | | | | | | | | | | | | | | | ------------------------------------------------------------------------ r181540 | void | 2013-05-09 13:10:38 -0700 (Thu, 09 May 2013) | 11 lines Generate a compact unwind encoding in the face of a stack alignment push. We generate a `push' of a random register (%rax) if the stack needs to be aligned by the size of that register. However, this could mess up compact unwind generation. In particular, we want to still generate compact unwind in the presence of this monstrosity. Check if the push of of the %rax/%eax register. If it is and it's marked with the `FrameSetup' flag, then we can generate a compact unwind encoding for the function only if the push is the last FrameSetup instruction. ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_33@181955 91177308-0d34-0410-b5e6-96231b3b80d8
* Merging r181580:Bill Wendling2013-05-16
| | | | | | | | | | | | | | | | | | | | ------------------------------------------------------------------------ r181580 | tstellar | 2013-05-09 19:09:45 -0700 (Thu, 09 May 2013) | 10 lines R600: Remove AMDILPeeopholeOptimizer and replace optimizations with tablegen patterns The BFE optimization was the only one we were actually using, and it was emitting an intrinsic that we don't support. https://bugs.freedesktop.org/show_bug.cgi?id=64201 Reviewed-by: Christian König <christian.koenig@amd.com> NOTE: This is a candidate for the 3.3 branch. ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_33@181954 91177308-0d34-0410-b5e6-96231b3b80d8
* Merging r181579:Bill Wendling2013-05-16
| | | | | | | | | | | | | | | | | | ------------------------------------------------------------------------ r181579 | tstellar | 2013-05-09 19:09:39 -0700 (Thu, 09 May 2013) | 8 lines R600: Expand SUB for v2i32/v4i32 Patch by: Aaron Watry Reviewed-by: Tom Stellard <thomas.stellard@amd.com> Signed-off-by: Aaron Watry <awatry@gmail.com> NOTE: This is a candidate for the 3.3 branch. ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_33@181953 91177308-0d34-0410-b5e6-96231b3b80d8
* Merging r181578:Bill Wendling2013-05-16
| | | | | | | | | | | | | | | | | | | | ------------------------------------------------------------------------ r181578 | tstellar | 2013-05-09 19:09:34 -0700 (Thu, 09 May 2013) | 10 lines R600: Expand MUL for v4i32/v2i32 Fixes piglit test for OpenCL builtin mul24, and allows mad24 to run. Patch by: Aaron Watry Reviewed-by: Tom Stellard <thomas.stellard@amd.com> Signed-off-by: Aaron Watry <awatry@gmail.com> NOTE: This is a candidate for the 3.3 branch. ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_33@181952 91177308-0d34-0410-b5e6-96231b3b80d8
* Merging r181577:Bill Wendling2013-05-16
| | | | | | | | | | | | | | | | | | | | ------------------------------------------------------------------------ r181577 | tstellar | 2013-05-09 19:09:29 -0700 (Thu, 09 May 2013) | 10 lines R600: Expand SRA for v4i32/v2i32 v2: Add v4i32 test Patch by: Aaron Watry Reviewed-by: Tom Stellard <thomas.stellard@amd.com> Signed-off-by: Aaron Watry <awatry@gmail.com> NOTE: This is a candidate for the 3.3 branch. ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_33@181951 91177308-0d34-0410-b5e6-96231b3b80d8
* Merging r181576:Bill Wendling2013-05-16
| | | | | | | | | | | | | | | | | | | | ------------------------------------------------------------------------ r181576 | tstellar | 2013-05-09 19:09:24 -0700 (Thu, 09 May 2013) | 10 lines R600: Expand vselect for v4i32 and v2i32 v2: Add vselect v4i32 test Patch by: Aaron Watry Reviewed-by: Tom Stellard <thomas.stellard@amd.com> Signed-off-by: Aaron Watry <awatry@gmail.com> NOTE: This is a candidate for the 3.3 branch. ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_33@181950 91177308-0d34-0410-b5e6-96231b3b80d8
* Merging r181842:Bill Wendling2013-05-15
| | | | | | | | | | | | | | | | | | | | | | | | ------------------------------------------------------------------------ r181842 | arnolds | 2013-05-14 15:33:24 -0700 (Tue, 14 May 2013) | 14 lines ARM ISel: Don't create illegal types during LowerMUL The transformation happening here is that we want to turn a "mul(ext(X), ext(X))" into a "vmull(X, X)", stripping off the extension. We have to make sure that X still has a valid vector type - possibly recreate an extension to a smaller type. In case of a extload of a memory type smaller than 64 bit we used create a ext(load()). The problem with doing this - instead of recreating an extload - is that an illegal type is exposed. This patch fixes this by creating extloads instead of ext(load()) sequences. Fixes PR15970. radar://13871383 ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_33@181946 91177308-0d34-0410-b5e6-96231b3b80d8
* Merging r181524:Bill Wendling2013-05-15
| | | | | | | | | | | | | | ------------------------------------------------------------------------ r181524 | rafael | 2013-05-09 10:22:59 -0700 (Thu, 09 May 2013) | 4 lines Don't replace an alias in llvm.used with its target. When we replace an internal alias with its target, be careful not to replace the entry in llvm.used (and llvm.compiler_used). ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_33@181909 91177308-0d34-0410-b5e6-96231b3b80d8
* Merging r181800:Bill Wendling2013-05-14
| | | | | | | | | | | | | | | | | | | | | | | | | ------------------------------------------------------------------------ r181800 | wschmidt | 2013-05-14 09:08:32 -0700 (Tue, 14 May 2013) | 15 lines PPC32: Fix stack collision between FP and CR save areas. The changes to CR spill handling missed a case for 32-bit PowerPC. The code in PPCFrameLowering::processFunctionBeforeFrameFinalized() checks whether CR spill has occurred using a flag in the function info. This flag is only set by storeRegToStackSlot and loadRegFromStackSlot. spillCalleeSavedRegisters does not call storeRegToStackSlot, but instead produces MI directly. Thus we don't see the CR is spilled when assigning frame offsets, and the CR spill ends up colliding with some other location (generally the FP slot). This patch sets the flag in spillCalleeSavedRegisters for PPC32 so that the CR spill is properly detected and gets its own slot in the stack frame. ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_33@181815 91177308-0d34-0410-b5e6-96231b3b80d8
* Merging r181586:Bill Wendling2013-05-14
| | | | | | | | | | | | | ------------------------------------------------------------------------ r181586 | d0k | 2013-05-10 02:16:52 -0700 (Fri, 10 May 2013) | 3 lines InstCombine: Verify the type before transforming uitofp into select. PR15952. ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_33@181813 91177308-0d34-0410-b5e6-96231b3b80d8
* Merging r181397:Bill Wendling2013-05-10
| | | | | | | | | | | | | ------------------------------------------------------------------------ r181397 | nicholas | 2013-05-08 02:00:10 -0700 (Wed, 08 May 2013) | 3 lines Fix a bug in codegenprep where it was losing track of values OptimizeMemoryInst by switching to a ValueMap. Patch by Andrea DiBiagio! ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_33@181619 91177308-0d34-0410-b5e6-96231b3b80d8
* Merging r181423:Bill Wendling2013-05-09
| | | | | | | | | | | | | | | ------------------------------------------------------------------------ r181423 | hfinkel | 2013-05-08 05:16:14 -0700 (Wed, 08 May 2013) | 5 lines PPCInstrInfo::optimizeCompareInstr should not optimize FP compares The floating-point record forms on PPC don't set the condition register bits based on a comparison with zero (like the integer record forms do), but rather based on the exception status bits. ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_33@181507 91177308-0d34-0410-b5e6-96231b3b80d8
* Merging r181286:Bill Wendling2013-05-08
| | | | | | | | | | | | | | | | | ------------------------------------------------------------------------ r181286 | arnolds | 2013-05-06 21:37:05 -0700 (Mon, 06 May 2013) | 7 lines LoopVectorize: getConsecutiveVector must respect signed arithmetic We were passing an i32 to ConstantInt::get where an i64 was needed and we must also pass the sign if we pass negatives numbers. The start index passed to getConsecutiveVector must also be signed. Should fix PR15882. ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_33@181455 91177308-0d34-0410-b5e6-96231b3b80d8
* DebugInfo: Support imported modules in lexical blocksDavid Blaikie2013-05-06
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181271 91177308-0d34-0410-b5e6-96231b3b80d8
* InstCombine: (X ^ signbit) + C -> X + (signbit ^ C)David Majnemer2013-05-06
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181249 91177308-0d34-0410-b5e6-96231b3b80d8
* Reduce attributes.Bill Wendling2013-05-06
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181245 91177308-0d34-0410-b5e6-96231b3b80d8
* Split Alignment out of the Section Characteristics.Rafael Espindola2013-05-06
| | | | | | | | The alignment is just a byte in the middle of Characteristics, not an independent flag. Making it an independent field in the yaml representation makes it more yamlio friendly. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181243 91177308-0d34-0410-b5e6-96231b3b80d8
* Test results verified using FileCheck rather than grep | countJean-Luc Duprat2013-05-06
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181234 91177308-0d34-0410-b5e6-96231b3b80d8
* Rotate multi-exit loops even if the latch was simplified.Andrew Trick2013-05-06
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Test case by Michele Scandale! Fixes PR10293: Load not hoisted out of loop with multiple exits. There are few regressions with this patch, now tracked by rdar:13817079, and a roughly equal number of improvements. The regressions are almost certainly back luck because LoopRotate has very little idea of whether rotation is profitable. Doing better requires a more comprehensive solution. This checkin is a quick fix that lacks generality (PR10293 has a counter-example). But it trivially fixes the case in PR10293 without interfering with other cases, and it does satify the criteria that LoopRotate is a loop canonicalization pass that should avoid heuristics and special cases. I can think of two approaches that would probably be better in the long run. Ultimately they may both make sense. (1) LoopRotate should check that the current header would make a good loop guard, and that the loop does not already has a sufficient guard. The artifical SimplifiedLoopLatch check would be unnecessary, and the design would be more general and canonical. Two difficulties: - We need a strong guarantee that we won't endlessly rotate, so the analysis would need to be precise in order to avoid the SimplifiedLoopLatch precondition. - Analysis like this are usually based on SCEV, which we don't want to rely on. (2) Rotate on-demand in late loop passes. This could even be done by shoving the loop back on the queue after the optimization that needs it. This could work well when we find LICM opportunities in multi-branch loops. This requires some work, and it doesn't really solve the problem of SCEV wanting a loop guard before the analysis. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181230 91177308-0d34-0410-b5e6-96231b3b80d8
* R600: Emit config values in register / value pairsTom Stellard2013-05-06
| | | | | | | Reviewed-by: Vincent Lejeune <vljn@ovi.com> Tested-By: Aaron Watry <awatry@gmail.com> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181228 91177308-0d34-0410-b5e6-96231b3b80d8
* R600: Stop emitting the instruction type byte before each instructionTom Stellard2013-05-06
| | | | | | | Reviewed-by: Vincent Lejeune <vljn@ovi.com> Tested-By: Aaron Watry <awatry@gmail.com> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181225 91177308-0d34-0410-b5e6-96231b3b80d8
* R600: Emit ISA for CALL_FS_* instructionsTom Stellard2013-05-06
| | | | | | | Reviewed-by: Vincent Lejeune <vljn@ovi.com> Tested-By: Aaron Watry <awatry@gmail.com> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181223 91177308-0d34-0410-b5e6-96231b3b80d8
* [SystemZ] Update non-pic DWARF encodingsUlrich Weigand2013-05-06
| | | | | | | | | | | | | | As pointed out by Rafael Espindola, we should match the DWARF encodings produced by GCC in both pic and non-pic modes. This was not the case for the non-pic case. This patch changes all DWARF encodings to DW_EH_PE_absptr for the non-pic case, just like GCC does. The test case is updated to check for both variants. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181222 91177308-0d34-0410-b5e6-96231b3b80d8
* PowerPC: Fix unimplemented relocation on ppc64Adhemerval Zanella2013-05-06
| | | | | | | | This patch handles the R_PPC64_REL64 relocation type for powerpc64 for mcjit. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181220 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix add4.ll test cmdline so that it passesJean-Luc Duprat2013-05-06
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181219 91177308-0d34-0410-b5e6-96231b3b80d8
* Provide InstCombines for the following 3 cases:Jean-Luc Duprat2013-05-06
| | | | | | | | | | | | | | | A * (1 - (uitofp i1 C)) -> select C, 0, A B * (uitofp i1 C) -> select C, B, 0 select C, 0, A + select C, B, 0 -> select C, B, A These come up in code that has been hand-optimized from a select to a linear blend, on platforms where that may have mattered. We want to undo such changes with the following transform: A*(1 - uitofp i1 C) + B*(uitofp i1 C) -> select C, A, B git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181216 91177308-0d34-0410-b5e6-96231b3b80d8
* AArch64: use MCJIT by default and enable related tests.Tim Northover2013-05-06
| | | | | | | This just enables some testing I'd missed after implementing MCJIT support. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181215 91177308-0d34-0410-b5e6-96231b3b80d8
* [SystemZ] Set up JIT/MCJIT test casesUlrich Weigand2013-05-06
| | | | | | | | | | | | | This patch adds the necessary configuration bits and #ifdef's to set up the JIT/MCJIT test cases for SystemZ. Like other recent targets, we do fully support MCJIT, but do not support the old JIT at all. Set up the lit config files accordingly, and disable old-JIT unit tests. Patch by Richard Sandiford. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181207 91177308-0d34-0410-b5e6-96231b3b80d8
* [SystemZ] Add MC test casesUlrich Weigand2013-05-06
| | | | | | | | | | This adds all MC tests for the SystemZ target. Patch by Richard Sandiford. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181206 91177308-0d34-0410-b5e6-96231b3b80d8
* [SystemZ] Add DebugInfo test casesUlrich Weigand2013-05-06
| | | | | | | | | | | | | This adds all DebugInfo tests for the SystemZ target. This version of the patch incorporates feedback from reviews by Eric Christopher and Rafael Espindola. Thanks to all reviewers! Patch by Richard Sandiford. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181205 91177308-0d34-0410-b5e6-96231b3b80d8
* [SystemZ] Add CodeGen test casesUlrich Weigand2013-05-06
| | | | | | | | | | | | | This adds all CodeGen tests for the SystemZ target. This version of the patch incorporates feedback from a review by Sean Silva. Thanks to all reviewers! Patch by Richard Sandiford. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181204 91177308-0d34-0410-b5e6-96231b3b80d8
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