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* Add missing test for GEP + bitcast transformationMatt Arsenault2013-08-16
* [tests] Add a hack to eliminate some dangling .s files on buildbots.Daniel Dunbar2013-08-16
* [tests] Remove an out-dated failing test.Daniel Dunbar2013-08-16
* Revert "R600/SI: Fix incorrect encoding of DS_WRITE_B32 instructions"Tom Stellard2013-08-16
* R600/SI: Fix incorrect encoding of DS_WRITE_B32 instructionsTom Stellard2013-08-16
* R600: Add support for global vector loads with element types less than 32-bitsTom Stellard2013-08-16
* R600: Add support for global vector stores with elements less than 32-bitsTom Stellard2013-08-16
* R600: Add support for i16 and i8 global storesTom Stellard2013-08-16
* R600: Add support for v4i32 stores on CaymanTom Stellard2013-08-16
* R600: Enable folding of inline literals into REQ_SEQUENCE instructionsTom Stellard2013-08-16
* R600: Change the RAT instruction assembly names so they match the docsTom Stellard2013-08-16
* [tests] Cleanup initialization of test suffixes.Daniel Dunbar2013-08-16
* InstCombine: Simplify if(x!=0 && x!=-1).Jim Grosbach2013-08-16
* Don't do FoldCmpLoadFromIndexedGlobal for non inbounds GEPsMatt Arsenault2013-08-15
* [tests] Fix refacto in r187764 that effectively disabled SimplifyCFG tests. :(Daniel Dunbar2013-08-15
* Fixing a corner-case bug in strchr and strrchr lib call optimizations whereYunzhong Gao2013-08-15
* DataFlowSanitizer: Add a debugging feature to help us track nonzero labels.Peter Collingbourne2013-08-15
* This fixes three issues related to Thumb literal loads:Mihai Popa2013-08-15
* [Mips][msa] Added the simple builtins (madd_q to xori)Jack Carter2013-08-15
* [Mips][msa] Added the simple builtins (fadd to ftq)Jack Carter2013-08-15
* [Mips][msa] Added the simple builtins (add_a to dpsub[su], ilvev to ldi)Jack Carter2013-08-15
* Revert r188449 as it turns out we're just missing the instructions that need ...Craig Topper2013-08-15
* Clang and AArch64 backend patches to support shll/shl and vmovl instructions ...Hao Liu2013-08-15
* Don't let isPermImmMask handle v16i32 since VPERMI doesn't match on that type...Craig Topper2013-08-15
* R600/SI: Improve legalization of vector operationsTom Stellard2013-08-14
* R600/SI: Replace v1i32 type with i32 in imageload and sample intrinsicsTom Stellard2013-08-14
* R600/SI: Convert v16i8 resource descriptors to i128Tom Stellard2013-08-14
* R600/SI: Use i8 types for resource descriptors in testsTom Stellard2013-08-14
* R600/SI: Lower BUILD_VECTOR to REG_SEQUENCE v2Tom Stellard2013-08-14
* R600/SI: Assign a register class to the $vaddr operand for MIMG instructionsTom Stellard2013-08-14
* DataFlowSanitizer: move abilist input file to Inputs.Peter Collingbourne2013-08-14
* R600/SI: Handle MSAA texture targetsTom Stellard2013-08-14
* R600/SI: Allow conversion between v32i8 and v8i32Tom Stellard2013-08-14
* R600/SI: Add pattern for fp_to_uintTom Stellard2013-08-14
* DataFlowSanitizer: Instrumentation for memset.Peter Collingbourne2013-08-14
* Actually fix PPC64 64-bit GPR inline asm constraint matchingHal Finkel2013-08-14
* DataFlowSanitizer: greylist is now ABI list.Peter Collingbourne2013-08-14
* llvm-symbolizer: add support for .gnu_debuglink sectionAlexey Samsonov2013-08-14
* Let t2LDRBi8 and t2LDRBi12 have same Base PointerRenato Golin2013-08-14
* Add test-case for hex floating-literalsTim Northover2013-08-14
* Support C99 hexadecimal floating-point literals in assemblyTim Northover2013-08-14
* [mips] Fix bug in parsing accumulator registers.Akira Hatanaka2013-08-14
* llvm/test/CodeGen/X86/setcc-sentinals.ll: Relax expressions for x86_64-win32.NAKAMURA Takumi2013-08-14
* Fix always creating GEP with i32 indicesMatt Arsenault2013-08-14
* [mips] Properly parse registers that appear in inline-asm constraints.Akira Hatanaka2013-08-14
* BBVectorize: Add initial stores to the write set when tracking usesHal Finkel2013-08-13
* Remove duplicate copy of testcase in r188327.Nick Lewycky2013-08-13
* Revert r187191, which broke opt -mem2reg on the testcases included in PR16867.Nick Lewycky2013-08-13
* DAG: Combine (and (setne X, 0), (setne X, -1)) -> (setuge (add X, 1), 2)Jim Grosbach2013-08-13
* [Mips] Support for unaligned load/store microMips instructionsJack Carter2013-08-13
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