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path: root/utils/TableGen/DAGISelEmitter.h
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* Stop emitting predicate functions. They are no longer used.Jakob Stoklund Olesen2010-09-03
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112924 91177308-0d34-0410-b5e6-96231b3b80d8
* optimize tblgen compile time by eliminating the old isel.Chris Lattner2010-03-01
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97504 91177308-0d34-0410-b5e6-96231b3b80d8
* Replace std::iostreams with raw_ostream in TableGen.Daniel Dunbar2009-07-03
| | | | | | | | | - Sorry, I can't help myself. - No intended functionality change. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74742 91177308-0d34-0410-b5e6-96231b3b80d8
* Add explicit keywords.Dan Gohman2009-02-18
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@64915 91177308-0d34-0410-b5e6-96231b3b80d8
* Teach the DAGISelEmitter to not compute the variable_ops operandDan Gohman2008-05-31
| | | | | | | | | | | | index for the input pattern in terms of the output pattern. Instead keep track of how many fixed operands the input pattern actually has, and have the input matching code pass the output-emitting function that index value. This simplifies the code, disentangles variables_ops from the support for predication operations, and makes variable_ops more robust. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51808 91177308-0d34-0410-b5e6-96231b3b80d8
* Move instruction flag inference out of InstrInfoEmitter and intoDan Gohman2008-04-03
| | | | | | | | | | | | | CodeGenDAGPatterns, where it can be used in other tablegen backends. This allows the inference to be done for DAGISelEmitter so that it gets accurate mayLoad/mayStore/isSimpleLoad flags. This brings MemOperand functionality back to where it was before 48329. However, it doesn't solve the problem of anonymous patterns which expand to code that does loads or stores. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49123 91177308-0d34-0410-b5e6-96231b3b80d8
* rename CodegenDAGPatterns -> CodeGenDAGPatternsChris Lattner2008-01-06
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45641 91177308-0d34-0410-b5e6-96231b3b80d8
* now that computing CodegenDAGPatterns doesn't implicitly print stuff Chris Lattner2008-01-05
| | | | | | | | | | out, DAGISelEmitter can compute it in its ctor, which simplifies some code. Now we can use CodegenDAGPatterns in other parts of tblgen that want access to dag pattern info, woo! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45636 91177308-0d34-0410-b5e6-96231b3b80d8
* move Node Transformation printing from CodeGenDAGPatterns -> DAGISelEmitter.Chris Lattner2008-01-05
| | | | | | | | The only difference in output is that we now print them in alphabetical order instead of reverse alphabetical order. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45635 91177308-0d34-0410-b5e6-96231b3b80d8
* move predicate printing code from CodeGenDAGPatterns -> DAGISelEmitter.Chris Lattner2008-01-05
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45634 91177308-0d34-0410-b5e6-96231b3b80d8
* fix a fixme by improving const correctness.Chris Lattner2008-01-05
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45633 91177308-0d34-0410-b5e6-96231b3b80d8
* change getQualifiedName to be a global function.Chris Lattner2008-01-05
| | | | | | | | | Split the pattern parsing code out from the dag isel emitter into it's own file. No functionality change. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45632 91177308-0d34-0410-b5e6-96231b3b80d8
* remove attributions from utils.Chris Lattner2007-12-29
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45419 91177308-0d34-0410-b5e6-96231b3b80d8
* Initial support for multi-result patterns:Evan Cheng2007-09-12
| | | | | | | | | | | | | 1. [(set GR32:$dst, (add GR32:$src1, GR32:$src2)), (modify EFLAGS)] This indicates the source pattern expects the instruction would produce 2 values. The first is the result of the addition. The second is an implicit definition in register EFLAGS. 2. def : Pat<(parallel (addc GR32:$src1, GR32:$src2), (modify EFLAGS)), ()> Similar to #1 except this is used for def : Pat patterns. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@41897 91177308-0d34-0410-b5e6-96231b3b80d8
* Refactor code to add initial support for OptionalDefOperand.Evan Cheng2007-07-06
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37933 91177308-0d34-0410-b5e6-96231b3b80d8
* Parse PredicateOperand's. When an instruction takes one, have the generatedChris Lattner2006-11-04
| | | | | | | | isel fill in the instruction operands with the 'execute always' value automatically. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31448 91177308-0d34-0410-b5e6-96231b3b80d8
* Added properties such as SDNPHasChain to ComplexPattern.Evan Cheng2006-10-11
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30890 91177308-0d34-0410-b5e6-96231b3b80d8
* A bit more clean up.Evan Cheng2006-08-26
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29893 91177308-0d34-0410-b5e6-96231b3b80d8
* - Clean up tablegen dag isel generator code.Evan Cheng2006-08-26
| | | | | | | | | | | | | | - Clean up the code generated by tablegen: * AddToISelQueue now takes one argument. * ComplexPattern matching condition can now be shared. * Eliminate passing unnecessary arguments to emit routines. * Eliminate some unneeded SDOperand declarations in select routines. * Other minor clean ups. - This reduces foot print slightly: X86ISelDAGToDAG.o is reduced from 971k to 823k. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29892 91177308-0d34-0410-b5e6-96231b3b80d8
* Making TableGen'd instruction selection code non-recursive. This fixes PR805.Evan Cheng2006-08-07
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29548 91177308-0d34-0410-b5e6-96231b3b80d8
* Parameterize target node ValueType to allow more sharing of emit functions.Evan Cheng2006-07-16
| | | | | | | | Also reduce the number of arguments passed to emit functions and removed a hack. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29160 91177308-0d34-0410-b5e6-96231b3b80d8
* Reduce instruction selection code size and stack frame size by factoringEvan Cheng2006-07-15
| | | | | | | | | | | code that emit target specific nodes into emit functions that are uniquified and shared among selection routines. e.g. This reduces X86ISelDAGToDAG.o (release) from ~2M to ~1.5M. Stack frame size of Select_store from ~13k down to ~8k. This is the first step. Further work to enable more sharing will follow. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29158 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove PointerType from target definition. Use abstract type MVT::iPTR toEvan Cheng2006-05-17
| | | | | | | represent pointer type. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28363 91177308-0d34-0410-b5e6-96231b3b80d8
* Rename AddedCost to AddedComplexity.Evan Cheng2006-04-19
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27841 91177308-0d34-0410-b5e6-96231b3b80d8
* Allow "let AddedCost = n in" to increase pattern complexity.Evan Cheng2006-04-19
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27834 91177308-0d34-0410-b5e6-96231b3b80d8
* Change approach so that we get codegen for free for intrinsics. With this,Chris Lattner2006-03-24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | intrinsics that don't take pointer arguments now work. For example, we can compile this: int test3( __m128d *A) { return _mm_movemask_pd(*A); } int test4( __m128 *A) { return _mm_movemask_ps(*A); } to this: _test3: movl 4(%esp), %eax movapd (%eax), %xmm0 movmskpd %xmm0, %eax ret _test4: movl 4(%esp), %eax movaps (%eax), %xmm0 movmskps %xmm0, %eax ret git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27090 91177308-0d34-0410-b5e6-96231b3b80d8
* Parse intrinsics correctly and perform type propagation. This doesn't currentlyChris Lattner2006-03-24
| | | | | | | emit the code to select intrinsics, but that is next :) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27082 91177308-0d34-0410-b5e6-96231b3b80d8
* Copy matching pattern's output type info to instruction result pattern.Evan Cheng2006-03-20
| | | | | | | | The instruction patterns do not contain enough information to resolve the exact type of the destination if it of a generic vector type. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26892 91177308-0d34-0410-b5e6-96231b3b80d8
* Add a new SDTCisIntVectorOfSameSize type constraintChris Lattner2006-03-20
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26890 91177308-0d34-0410-b5e6-96231b3b80d8
* Match getTargetNode() changes (now returns SDNode* instead of SDOperand).Evan Cheng2006-02-09
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26084 91177308-0d34-0410-b5e6-96231b3b80d8
* Hoist all SDOperand declarations within a Select_{opcode}() to the top levelEvan Cheng2006-02-07
| | | | | | | to reduce stack memory usage. This is intended to work around the gcc bug. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26026 91177308-0d34-0410-b5e6-96231b3b80d8
* Allow more loads to be folded which were previously prevented from happeningEvan Cheng2006-02-05
| | | | | | | | | | | | | | | | | due to ordering issue. i.e. they were selected for chain use first. Now at load select time, check if it is being selected for a chain use and if it has only a single real use. If so, return a HANDLENODE (with the load as its operand) in its place and record it. When it is folded or the load is selected for a real use, the isel records it as the replacement for the HANDLENODE. The replacement is done when all nodes are selected. This scheme exposed a couple of problems where cycles can happen. (See comments in EmitMatchCode() for descriptions of the problems and their workaround / solutions.) These problems have been resolved with a small compile time penality. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25995 91177308-0d34-0410-b5e6-96231b3b80d8
* Factor matching code that is common between patterns. This works aroundChris Lattner2006-01-29
| | | | | | | | GCC not jump-threading across this common code, and produces far nicer output. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25762 91177308-0d34-0410-b5e6-96231b3b80d8
* move some code around, no change in the generated codeChris Lattner2006-01-29
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25758 91177308-0d34-0410-b5e6-96231b3b80d8
* Teach tablegen to generate code that is VC++ warning-free.Jeff Cohen2006-01-27
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25709 91177308-0d34-0410-b5e6-96231b3b80d8
* fix a broken commentChris Lattner2006-01-17
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25411 91177308-0d34-0410-b5e6-96231b3b80d8
* * Remove instruction fields hasInFlag / hasOutFlag and added SNDPInFlag andEvan Cheng2006-01-09
| | | | | | | | | | SNDPOutFlag to DAG nodes. These properties do not belong to target specific instructions. * Added DAG node property SNDPOptInFlag. It's same as SNDPInFlag except it's optional. Used by ret / call, etc. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25154 91177308-0d34-0410-b5e6-96231b3b80d8
* Add support for generating v4i32 altivec codeNate Begeman2005-12-30
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25046 91177308-0d34-0410-b5e6-96231b3b80d8
* * Support for hasInFlag and hasOutFlag (on instructions). Remove nameless FLAGEvan Cheng2005-12-23
| | | | | | | | support which is fragile. * Fixed a number of bugs. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24996 91177308-0d34-0410-b5e6-96231b3b80d8
* * Added support for FLAG - a special nameless flag register. Can be used asEvan Cheng2005-12-22
| | | | | | | | either an operand or a result. * Fixed some more flag / chain bugs. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24933 91177308-0d34-0410-b5e6-96231b3b80d8
* Support for read / write from explicit registers with FlagVT type.Evan Cheng2005-12-17
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24753 91177308-0d34-0410-b5e6-96231b3b80d8
* Added support to specify predicates.Evan Cheng2005-12-14
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24715 91177308-0d34-0410-b5e6-96231b3b80d8
* Add a new SDTCisPtrTy constraint, which indicates that an operand must haveChris Lattner2005-12-09
| | | | | | | the same type as the pointer type for a target. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24649 91177308-0d34-0410-b5e6-96231b3b80d8
* * Do not allow nodes which produce chain results (e.g. loads) to be folded ifEvan Cheng2005-12-09
| | | | | | | | | | it has more than one real use (non-chain uses). * Record folded chain producing node in CodeGenMap. * Do not fold a chain producing node if it has already been selected as an operand of a chain use. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24647 91177308-0d34-0410-b5e6-96231b3b80d8
* Prevent folding of instructions which produce chains that have more than 1 ↵Evan Cheng2005-12-09
| | | | | | real use git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24643 91177308-0d34-0410-b5e6-96231b3b80d8
* * Make sure complex pattern operands are selected first since their selectEvan Cheng2005-12-09
| | | | | | | | functions can return false and causing the instruction pattern match to fail. * Code clean up. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24642 91177308-0d34-0410-b5e6-96231b3b80d8
* Added support for ComplexPattern. These are patterns that require C++ patternEvan Cheng2005-12-08
| | | | | | | | matching code that is not currently auto-generated by tblgen, e.g. X86 addressing mode. Selection routines for complex patterns can return multiple operands, e.g. X86 addressing mode returns 4. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24634 91177308-0d34-0410-b5e6-96231b3b80d8
* * Commit the fix (by Chris) for a tblgen type inferencing bug.Evan Cheng2005-12-04
| | | | | | | | | | | | * Enhanced tblgen to handle instructions which have chain operand and writes a chain result. * Enhanced tblgen to handle instructions which produces no results. Part of the change is a temporary hack which relies on instruction property (e.g. isReturn, isBranch). The proper fix would be to change the .td syntax to separate results dag from ops dag. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24587 91177308-0d34-0410-b5e6-96231b3b80d8
* Teach tblgen to accept register source operands in patterns, e.g.Evan Cheng2005-12-01
| | | | | | | | | | | | def SHL8rCL : I<0xD2, MRM4r, (ops R8 :$dst, R8 :$src), "shl{b} {%cl, $dst|$dst, %CL}", [(set R8:$dst, (shl R8:$src, CL))]>, Imp<[CL],[]>; This generates a CopyToReg operand and added its 2nd result to the shl as a flag operand. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24557 91177308-0d34-0410-b5e6-96231b3b80d8
* Stop checking the ValueType of the CodeGenInstruction. Instead, use theNate Begeman2005-12-01
| | | | | | | | ValueType from the RegisterClass or Operands. This step is necessary to allow RegisterClasses to have multiple ValueTypes. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24555 91177308-0d34-0410-b5e6-96231b3b80d8
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