| Commit message (Expand) | Author | Age |
|---|
| * | Add support of RTM from TSX extension | Michael Liao | 2012-11-08 |
| * | Remove code for setting the VEX L-bit as a function of operand size from the ... | Craig Topper | 2012-09-19 |
| * | Add support for converting llvm.fma to fma4 instructions. | Craig Topper | 2012-08-31 |
| * | Mark MOVZX32_NOREX as isCodeGenOnly and neverHasSideEffects. The isCodeGenOnl... | Craig Topper | 2012-07-30 |
| * | Remove some unnecessary filter checks. They were already covered by IsCodeGen... | Craig Topper | 2012-07-30 |
| * | Remove check for sub class of X86Inst from filter function since caller guara... | Craig Topper | 2012-07-30 |
| * | Simplify code that filtered certain instructions in two different ways. No fu... | Craig Topper | 2012-07-30 |
| * | Remove check for f256mem from has256BitOperands as nothing depended on it and... | Craig Topper | 2012-07-30 |
| * | Remove trailing whitespace. | Craig Topper | 2012-07-30 |
| * | Make l/q suffixes on AVX forms of scalar convert instructions consistent with... | Craig Topper | 2012-07-26 |
| * | Move around some enum elements so that lastMRM corrects gets assigned 56, which | Richard Trieu | 2012-07-18 |
| * | Make x86 asm parser to check for xmm vs ymm for index register in gather inst... | Craig Topper | 2012-07-18 |
| * | Update GATHER instructions to support 2 read-write operands. Patch from mysel... | Craig Topper | 2012-07-12 |
| * | X86: add GATHER intrinsics (AVX2) in LLVM | Manman Ren | 2012-06-26 |
| * | Add intrinsics, code gen, assembler and disassembler support for the SSE4a ex... | Benjamin Kramer | 2012-05-29 |
| * | Add support for AVX enhanced comparison predicates. Patch from Kay Tiong Khoo. | Craig Topper | 2012-04-03 |
| * | Fix the x86 disassembler to at least print the lock prefix if it is the first | Kevin Enderby | 2012-03-09 |
| * | X86 disassembler support for jcxz, jecxz, and jrcxz. Fixes PR11643. Patch by ... | Craig Topper | 2012-02-27 |
| * | Add vmfunc instruction to X86 assembler and disassembler. | Craig Topper | 2012-02-19 |
| * | Add X86 assembler and disassembler support for AMD SVM instructions. Original... | Craig Topper | 2012-02-18 |
| * | Add disassembler support for VPERMIL2PD and VPERMIL2PS. | Craig Topper | 2011-12-30 |
| * | Add FMA4 instructions to disassembler. | Craig Topper | 2011-12-30 |
| * | Remove some unnecessary filtering checks from X86 disassembler table build. | Craig Topper | 2011-11-19 |
| * | More AVX2 instructions and their intrinsics. | Craig Topper | 2011-11-06 |
| * | Add X86 RORX instruction | Craig Topper | 2011-10-23 |
| * | Add X86 PEXTR and PDEP instructions. | Craig Topper | 2011-10-16 |
| * | Add X86 BZHI instruction as well as BMI2 feature detection. | Craig Topper | 2011-10-16 |
| * | Add X86 INVPCID instruction. Add 32/64-bit predicates to INVEPT, INVVPID, VMR... | Craig Topper | 2011-10-16 |
| * | Add X86 BEXTR instruction. This instruction uses VEX.vvvv to encode Operand 3... | Craig Topper | 2011-10-16 |
| * | Add support for X86 blsr, blsmsk, and blsi instructions. Required extra work ... | Craig Topper | 2011-10-15 |
| * | Add X86 ANDN instruction. Including instruction selection. | Craig Topper | 2011-10-14 |
| * | Fix disassembling of popcntw. Also remove some code that says it accounts for... | Craig Topper | 2011-10-11 |
| * | Fix assembling of xchg %eax, %eax to not use the NOP encoding of 0x90. This w... | Craig Topper | 2011-10-06 |
| * | Add support in the disassembler for ignoring the L-bit on certain VEX instruc... | Craig Topper | 2011-10-04 |
| * | Fix disassembling of INVEPT and INVVPID to take operands | Craig Topper | 2011-10-01 |
| * | Fix disassembler handling of CRC32 which is an odd instruction that uses 0xf2... | Craig Topper | 2011-10-01 |
| * | Don't allow 32-bit only instructions to be disassembled in 64-bit mode. Fixes... | Craig Topper | 2011-09-23 |
| * | Fix mem type for VEX.128 form of VROUNDP*. Remove filter preventing VROUND fr... | Craig Topper | 2011-09-14 |
| * | Remove filter that was preventing MOVDQU/MOVDQA and their VEX forms from bein... | Craig Topper | 2011-09-13 |
| * | Fix disassembling of reverse register/register forms of ADD/SUB/XOR/OR/AND/SB... | Craig Topper | 2011-09-11 |
| * | Fix disassembling of PAUSE instruction. Fixes PR10900. Also fixed NOP disasse... | Craig Topper | 2011-09-11 |
| * | Fix the disassembly of the X86 "crc32w %ax, %eax" instruction. Bug 10702. | Kevin Enderby | 2011-09-02 |
| * | Add vvvv support to disassembling of instructions with MRMDestMem and MRMDest... | Craig Topper | 2011-08-30 |
| * | Fix the disassembly of the X86 crc32 instruction. Bug 10702 and rdar://8795217 | Kevin Enderby | 2011-08-29 |
| * | Unconstify Inits | David Greene | 2011-07-29 |
| * | [AVX] Constify Inits | David Greene | 2011-07-29 |
| * | Fix llvm-mc handing of x86 instructions that take 8-bit unsigned immediates. | Kevin Enderby | 2011-07-27 |
| * | Make the disassembler able to disassemble a bunch of instructions with names ... | Eli Friedman | 2011-07-16 |
| * | Revert r134921, 134917, 134908 and 134907. They're causing failures | Eric Christopher | 2011-07-11 |
| * | [AVX] Make Inits Foldable | David Greene | 2011-07-11 |
