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* Remove dead code.Rafael Espindola2013-12-02
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@196066 91177308-0d34-0410-b5e6-96231b3b80d8
* [weak vtables] Place class definitions into anonymous namespaces to prevent ↵Juergen Ributzka2013-11-19
| | | | | | | | | | weak vtables. This patch places class definitions in implementation files into anonymous namespaces to prevent weak vtables. This eliminates the need of providing an out-of-line definition to pin the vtable explicitly to the file. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195092 91177308-0d34-0410-b5e6-96231b3b80d8
* [weak vtables] Remove a bunch of weak vtablesJuergen Ributzka2013-11-19
| | | | | | | | | | | | This patch removes most of the trivial cases of weak vtables by pinning them to a single object file. The memory leaks in this version have been fixed. Thanks Alexey for pointing them out. Differential Revision: http://llvm-reviews.chandlerc.com/D2068 Reviewed by Andy git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195064 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert r194865 and r194874.Alexey Samsonov2013-11-18
| | | | | | | | | | | | | This change is incorrect. If you delete virtual destructor of both a base class and a subclass, then the following code: Base *foo = new Child(); delete foo; will not cause the destructor for members of Child class. As a result, I observe plently of memory leaks. Notable examples I investigated are: ObjectBuffer and ObjectBufferStream, AttributeImpl and StringSAttributeImpl. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194997 91177308-0d34-0410-b5e6-96231b3b80d8
* TableGen: Generate an enum for all named Operand types in tblgen'd InstrInfo.Ahmed Bougacha2013-11-17
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194978 91177308-0d34-0410-b5e6-96231b3b80d8
* Small improvement to InstrinsicEmitter::EmitAttributes. This change removes ↵Owen Anderson2013-11-16
| | | | | | | | | the “pushing” and “clearing” of the SmallVector and instead uses const arrays to pass the attributeKinds to AttributeSet::get . Patch by Aditya Nandakumar. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194899 91177308-0d34-0410-b5e6-96231b3b80d8
* [weak vtables] Remove a bunch of weak vtablesJuergen Ributzka2013-11-15
| | | | | | | | | | | This patch removes most of the trivial cases of weak vtables by pinning them to a single object file. Differential Revision: http://llvm-reviews.chandlerc.com/D2068 Reviewed by Andy git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194865 91177308-0d34-0410-b5e6-96231b3b80d8
* AVX-512: added VPCONFLICT instruction and intrinsics,Elena Demikhovsky2013-11-03
| | | | | | | added EVEX_KZ to tablegen git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193959 91177308-0d34-0410-b5e6-96231b3b80d8
* Lower stackmap intrinsics directly to their target opcode in the DAG builder.Andrew Trick2013-10-31
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193769 91177308-0d34-0410-b5e6-96231b3b80d8
* Enable variable arguments support for intrinsics.Andrew Trick2013-10-31
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193766 91177308-0d34-0410-b5e6-96231b3b80d8
* whitespaceAndrew Trick2013-10-31
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193765 91177308-0d34-0410-b5e6-96231b3b80d8
* TableGen: remove unused variable.Ahmed Bougacha2013-10-28
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193527 91177308-0d34-0410-b5e6-96231b3b80d8
* TableGen: Refactor DAG patterns to enable parsing one pattern at a time.Ahmed Bougacha2013-10-28
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193526 91177308-0d34-0410-b5e6-96231b3b80d8
* TableGen: Refactor AsmWriterEmitter to keep AsmWriterInsts.Ahmed Bougacha2013-10-28
| | | | | | | | These used to be referenced by the CGI->AWI map (in AsmWriterEmitter), but stored in a vector local to EmitPrintInstruction. Move the vector to AsmWriterEmitter too. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193525 91177308-0d34-0410-b5e6-96231b3b80d8
* Typo.Peter Collingbourne2013-10-20
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193043 91177308-0d34-0410-b5e6-96231b3b80d8
* Allow pinsrw/pinsrb/pextrb/pextrw/movmskps/movmskpd/pmovmskb/extractps ↵Craig Topper2013-10-14
| | | | | | instructions to parse either GR32 or GR64 without resorting to duplicating instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192567 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove more filters from the disassembler. Mark some AVX512 instructions as ↵Craig Topper2013-10-12
| | | | | | CodeGenOnly. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192525 91177308-0d34-0410-b5e6-96231b3b80d8
* Mark some more instructions as CodeGenOnly. Remove filters from the ↵Craig Topper2013-10-12
| | | | | | disassembler. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192522 91177308-0d34-0410-b5e6-96231b3b80d8
* Add missing #include's to cctype when using isdigit/alpha/etc.Will Dietz2013-10-12
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192519 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove another unnecessary filter from the disassembler.Craig Topper2013-10-11
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192425 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix so CRC32r64r8 isn't accidentally filtered from the disassembler tables.Craig Topper2013-10-10
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192339 91177308-0d34-0410-b5e6-96231b3b80d8
* More x86 disassembler filtering cleanup.Craig Topper2013-10-09
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192279 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove some old filters from the x86 disassembler table builder.Craig Topper2013-10-09
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192275 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove unneeded MMX instruction definition by moving pattern to an ↵Craig Topper2013-10-08
| | | | | | equivalent instruction definition and removing the filtering from the disassembler table building. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192175 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove some instructions that existed to provide aliases to the assembler. ↵Craig Topper2013-10-08
| | | | | | Can be done with InstAlias instead. Unfortunately, this was causing printer to use 'vmovq' or 'vmovd' based on what was parsed. To cleanup the inconsistencies convert all 'vmovd' with 64-bit registers to 'vmovq', but provide an alias so that 'vmovd' will still parse. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192171 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove some instructions that seem to only exist to trick the filtering ↵Craig Topper2013-10-07
| | | | | | checks in the disassembler table creation. Just fix up the filter to let the real instruction through instead. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192090 91177308-0d34-0410-b5e6-96231b3b80d8
* Add disassembler support for long encodings for INC/DEC in 32-bit mode.Craig Topper2013-10-07
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192086 91177308-0d34-0410-b5e6-96231b3b80d8
* Add OPC_CheckChildSame0-3 to the DAG isel matcher. This replaces sequences ↵Craig Topper2013-10-05
| | | | | | of MoveChild, CheckSame, MoveParent. Saves 846 bytes from the X86 DAG isel matcher, ~300 from ARM, ~840 from Hexagon. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192026 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert r191940 to see if it fixes the build bots.Craig Topper2013-10-04
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191941 91177308-0d34-0410-b5e6-96231b3b80d8
* Add OPC_CheckChildSame0-3 to the DAG isel matcher. This replaces sequences ↵Craig Topper2013-10-04
| | | | | | of MoveChild, CheckSame, MoveParent. Saves 846 bytes from the X86 DAG isel matcher, ~300 from ARM, ~840 from Hexagon. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191940 91177308-0d34-0410-b5e6-96231b3b80d8
* Add XOP disassembler support. Fixes PR13933.Craig Topper2013-10-03
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191874 91177308-0d34-0410-b5e6-96231b3b80d8
* Add v4f16 to supported value types.Pete Cooper2013-10-03
| | | | | | | This is useful for some ARM intrinsics such as VCVTN which does a <4 x float> <-> <4 x half> conversion. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191870 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove several unused variables.Rafael Espindola2013-10-01
| | | | | | Patch by Alp Toker. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191757 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix pattern sort in DAGISelEmitter.cppRichard Sandiford2013-10-01
| | | | | | | | The old code skipped one of the sorting criteria if either pattern had no types. This could lead to cycles of the form X < Y, Y < Z, Z < X. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191735 91177308-0d34-0410-b5e6-96231b3b80d8
* Filter out repeated sections from the X86 disassembler modRMTable. Saves ↵Craig Topper2013-09-30
| | | | | | about ~43K from a released build. Unfortunately the disassembler tables are still upwards of 800K. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191652 91177308-0d34-0410-b5e6-96231b3b80d8
* Various x86 disassembler fixes.Craig Topper2013-09-30
| | | | | | | | | | | | | Add VEX_LIG to scalar FMA4 instructions. Use VEX_LIG in some of the inheriting checks in disassembler table generator. Make use of VEX_L_W, VEX_L_W_XS, VEX_L_W_XD contexts. Don't let VEX_L_W, VEX_L_W_XS, VEX_L_W_XD, VEX_L_W_OPSIZE inherit from their non-L forms unless VEX_LIG is set. Let VEX_L_W, VEX_L_W_XS, VEX_L_W_XD, VEX_L_W_OPSIZE inherit from all of their non-L or non-W cases. Increase ranking on VEX_L_W, VEX_L_W_XS, VEX_L_W_XD, VEX_L_W_OPSIZE so they get chosen over non-L/non-W forms. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191649 91177308-0d34-0410-b5e6-96231b3b80d8
* Mark the x86 machine model as incomplete. PR17367.Andrew Trick2013-09-25
| | | | | | | | | | | | Ideally, the machinel model is added at the time the instructions are defined. But many instructions in X86InstrSSE.td still need a model. Without this workaround the scheduler asserts because x86 already has itinerary classes for these instructions, indicating they should be modeled by the scheduler. Since we use the new machine model for other instructions, it expects a new machine model for these too. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191391 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix doxygen comments to use correct function name.Craig Topper2013-09-25
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191356 91177308-0d34-0410-b5e6-96231b3b80d8
* Replace EVT with MVT in CodeGenDAGAPatterns.cpp.Craig Topper2013-09-25
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191355 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix formatting to match coding standards.Craig Topper2013-09-24
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191280 91177308-0d34-0410-b5e6-96231b3b80d8
* Initial support for Neon scalar instructions.Jiangning Liu2013-09-24
| | | | | | | | | | | | Patch by Ana Pazos. 1.Added support for v1ix and v1fx types. 2.Added Scalar Pairwise Reduce instructions. 3.Added initial implementation of Scalar Arithmetic instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191263 91177308-0d34-0410-b5e6-96231b3b80d8
* Add missing index comments to the left side of the DAG ISel matcher table ↵Craig Topper2013-09-22
| | | | | | for each individual case of SwitchOpcode/Type. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191181 91177308-0d34-0410-b5e6-96231b3b80d8
* Provide basic type safety for array_pod_sort comparators.Benjamin Kramer2013-09-22
| | | | | | | | This makes using array_pod_sort significantly safer. The implementation relies on function pointer casting but that should be safe as we're dealing with void* here. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191175 91177308-0d34-0410-b5e6-96231b3b80d8
* TableGen: fix constness of new comparison function.Tim Northover2013-09-16
| | | | | | libc++ didn't seem to like a non-const call operator. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190797 91177308-0d34-0410-b5e6-96231b3b80d8
* TableGen: give asm match classes deterministic order.Tim Northover2013-09-16
| | | | | | | | | | | | | | | TableGen was sorting the entries in some of its internal data structures by pointer. This order filtered through to the final matching table and affected the diagnostics produced on bad assembly occasionally. It also turns out STL algorithms are ridiculously easy to misuse on containers with custom order methods. (No bugs before, or now that I know of, but plenty in the middle). This should fix the sanitizer bot, which ends up with weird pointers. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190793 91177308-0d34-0410-b5e6-96231b3b80d8
* AsmMatcher: emit subtarget feature enum in deterministic order.Tim Northover2013-09-16
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190792 91177308-0d34-0410-b5e6-96231b3b80d8
* Replace some unnecessary vector copies with references.Benjamin Kramer2013-09-15
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190770 91177308-0d34-0410-b5e6-96231b3b80d8
* Add an instruction deprecation feature to TableGen.Joey Gouly2013-09-12
| | | | | | | | | | | | | | | | | | | | | | | | The 'Deprecated' class allows you to specify a SubtargetFeature that the instruction is deprecated on. The 'ComplexDeprecationPredicate' class allows you to define a custom predicate that is called to check for deprecation. For example: ComplexDeprecationPredicate<"MCR"> would mean you would have to define the following function: bool getMCRDeprecationInfo(MCInst &MI, MCSubtargetInfo &STI, std::string &Info) Which returns 'false' for not deprecated, and 'true' for deprecated and store the warning message in 'Info'. The MCTargetAsmParser constructor was chaned to take an extra argument of the MCInstrInfo class, so out-of-tree targets will need to be changed. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190598 91177308-0d34-0410-b5e6-96231b3b80d8
* llvm-tblgen: Mangle operand replacements into the strings in printAliasInstr.Benjamin Kramer2013-09-11
| | | | | | Cuts down the bloat in the AArch64 asm writer a bit. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190527 91177308-0d34-0410-b5e6-96231b3b80d8
* llvm-tblgen: Stabilize subreg index tables.Benjamin Kramer2013-09-11
| | | | | | Otherwise SequenceToOffsetTable will sort by pointer and becomes non-deterministic. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190514 91177308-0d34-0410-b5e6-96231b3b80d8
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