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* llvmc: Update examples.Mikhail Glushenkov2010-08-19
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111553 91177308-0d34-0410-b5e6-96231b3b80d8
* Use std::string instead of StringRef in ClangAttrEmitter.cpp; per report onEli Friedman2010-08-19
| | | | | | | | | cfe-dev, fixes an error compiling with MSVC. Using a StringRef here doesn't look safe in any case. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111513 91177308-0d34-0410-b5e6-96231b3b80d8
* Add include missing for VC build.Sean Hunt2010-08-19
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111484 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove three spurious semicolonsSean Hunt2010-08-19
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111480 91177308-0d34-0410-b5e6-96231b3b80d8
* Finish full attribute class emission for clang.Sean Hunt2010-08-18
| | | | | | For more information, see the accompanying clang patch. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111454 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove predicate workaround, we're going to require that predicateEric Christopher2010-08-17
| | | | | | | and optional def operands are handled in the backend support. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111220 91177308-0d34-0410-b5e6-96231b3b80d8
* Rename sat_shift operand to shift_imm, in preparation for using it for otherBob Wilson2010-08-16
| | | | | | | instructions besides saturate instructions. No functional changes. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111168 91177308-0d34-0410-b5e6-96231b3b80d8
* llvmc: remove dynamic plugins.Mikhail Glushenkov2010-08-15
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111094 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert r111007.Mikhail Glushenkov2010-08-13
| | | | | | Apparently, this is now fixed in Clang. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111032 91177308-0d34-0410-b5e6-96231b3b80d8
* Add a workaround for building with Clang.Mikhail Glushenkov2010-08-13
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111007 91177308-0d34-0410-b5e6-96231b3b80d8
* llvmc: fix two tests, remove XFAILs.Mikhail Glushenkov2010-08-13
| | | | | | | Tested on Linux and Darwin; please add platform-specific XFAILs/mail me a bug report if this still fails. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110998 91177308-0d34-0410-b5e6-96231b3b80d8
* Cleaned up the for-disassembly-only entries in the arm instruction table so thatJohnny Chen2010-08-12
| | | | | | | | the memory barrier variants (other than 'SY' full system domain read and write) are treated as one instruction with option operand. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110951 91177308-0d34-0410-b5e6-96231b3b80d8
* tblgen/AsmMatcher: Always emit the match function as 'MatchInstructionImpl',Daniel Dunbar2010-08-12
| | | | | | target specific parsers can adapt the TargetAsmParser to this. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110888 91177308-0d34-0410-b5e6-96231b3b80d8
* Move the ARM SSAT and USAT optional shift amount operand out of theBob Wilson2010-08-11
| | | | | | | instruction opcode. This also fixes part of PR7792. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110875 91177308-0d34-0410-b5e6-96231b3b80d8
* tblgen/AsmMatcher: Treat '.' in assembly strings as a token separator.Daniel Dunbar2010-08-11
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110789 91177308-0d34-0410-b5e6-96231b3b80d8
* tblgen/AsmMatcher: Downgrade instructions with tied operands to a debug-only ↵Daniel Dunbar2010-08-11
| | | | | | warning, for now. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110779 91177308-0d34-0410-b5e6-96231b3b80d8
* Add a separate ARM instruction format for Saturate instructions.Bob Wilson2010-08-11
| | | | | | | | | | (I discovered 2 more copies of the ARM instruction format list, bringing the total to 4!! Two of them were already out of sync. I haven't yet gotten into the disassembler enough to know the best way to fix this, but something needs to be done.) Add support for encoding these instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110754 91177308-0d34-0410-b5e6-96231b3b80d8
* We already have this as OperandNode.Eric Christopher2010-08-10
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110748 91177308-0d34-0410-b5e6-96231b3b80d8
* Add back in r109901, which adds a Compare flag to the target instructions. It'sBill Wendling2010-08-08
| | | | | | | useful after all. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110531 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix eabi calling convention when a 64 bit value shadows r3.Rafael Espindola2010-08-06
| | | | | | | | | | | Without this what was happening was: * R3 is not marked as "used" * ARM backend thinks it has to save it to the stack because of vaarg * Offset computation correctly ignores it * Offsets are wrong git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110446 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert r109901. The implementation of <rdar://problem/7405933> (r110423) doesn'tBill Wendling2010-08-06
| | | | | | | | | | | | | | | need the Compare flag after all. --- Reverse-merging r109901 into '.': U include/llvm/Target/TargetInstrDesc.h U include/llvm/Target/Target.td U utils/TableGen/InstrInfoEmitter.cpp U utils/TableGen/CodeGenInstruction.cpp U utils/TableGen/CodeGenInstruction.h git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110424 91177308-0d34-0410-b5e6-96231b3b80d8
* Moar words!Eric Christopher2010-08-06
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110422 91177308-0d34-0410-b5e6-96231b3b80d8
* Add tablegen support for vdup_laneNate Begeman2010-08-06
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110419 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove IntrWriteMem, as it's the default. Rename IntrWriteArgMemDan Gohman2010-08-05
| | | | | | | to IntrReadWriteArgMem, as it's for reading as well as writing. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110395 91177308-0d34-0410-b5e6-96231b3b80d8
* Add a "Compare" flag to the target instruction descriptor. This will be usedBill Wendling2010-07-30
| | | | | | | | later to identify and possibly remove superfluous compare instructions -- those that are testing for and setting a status flag that should already be set. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109901 91177308-0d34-0410-b5e6-96231b3b80d8
* Many Thumb2 instructions can reference the full ARM register set (i.e.,Jim Grosbach2010-07-30
| | | | | | | | | | | | | | | | | | | | | | | | | | | have 4 bits per register in the operand encoding), but have undefined behavior when the operand value is 13 or 15 (SP and PC, respectively). The trivial coalescer in linear scan sometimes will merge a copy from SP into a subsequent instruction which uses the copy, and if that instruction cannot legally reference SP, we get bad code such as: mls r0,r9,r0,sp instead of: mov r2, sp mls r0, r9, r0, r2 This patch adds a new register class for use by Thumb2 that excludes the problematic registers (SP and PC) and is used instead of GPR for those operands which cannot legally reference PC or SP. The trivial coalescer explicitly requires that the register class of the destination for the COPY instruction contain the source register for the COPY to be considered for coalescing. This prevents errant instructions like that above. PR7499 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109842 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix a warning from gcc-4.0 (from the ppc buildbot).Bob Wilson2010-07-28
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109605 91177308-0d34-0410-b5e6-96231b3b80d8
* Filter out patterns that have PredicateOperands.Eric Christopher2010-07-28
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109572 91177308-0d34-0410-b5e6-96231b3b80d8
* Return -1 only on failure to execute a program.Mikhail Glushenkov2010-07-27
| | | | | | Also fix some comments. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109499 91177308-0d34-0410-b5e6-96231b3b80d8
* 80-col.Eric Christopher2010-07-26
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109407 91177308-0d34-0410-b5e6-96231b3b80d8
* Get rid of exceptions in llvmc.Mikhail Glushenkov2010-07-23
| | | | | | llvmc can be now compiled with llvm-gcc on Windows. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109215 91177308-0d34-0410-b5e6-96231b3b80d8
* Hack around extracts that aren't easy to process.Eric Christopher2010-07-21
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109043 91177308-0d34-0410-b5e6-96231b3b80d8
* remove option from tablegen for building static header.Chris Lattner2010-07-20
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108893 91177308-0d34-0410-b5e6-96231b3b80d8
* Add 256-bit vaddsub, vhadd, vhsub, vblend and vdpp instructions!Bruno Cardoso Lopes2010-07-19
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108769 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove code duplication.Mikhail Glushenkov2010-07-19
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108718 91177308-0d34-0410-b5e6-96231b3b80d8
* Better error reporting for switch_list.Mikhail Glushenkov2010-07-19
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108714 91177308-0d34-0410-b5e6-96231b3b80d8
* TblGen/AsmMatcher: Add support for honoring instruction Requires<[]> ↵Daniel Dunbar2010-07-19
| | | | | | | | attributes as part of the matcher. - Currently includes a hack to limit ourselves to "In32BitMode" and "In64BitMode", because we don't have the other infrastructure to properly deal with setting SSE, etc. features on X86. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108677 91177308-0d34-0410-b5e6-96231b3b80d8
* llvmc: Add a new option type (switch_list).Mikhail Glushenkov2010-07-19
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108673 91177308-0d34-0410-b5e6-96231b3b80d8
* Update comment.Bill Wendling2010-07-16
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108571 91177308-0d34-0410-b5e6-96231b3b80d8
* Rename DBG_LABEL PROLOG_LABEL, because it's only used during prolog emission andBill Wendling2010-07-16
| | | | | | | thus is a much more meaningful name. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108563 91177308-0d34-0410-b5e6-96231b3b80d8
* Convert some tab stops into spaces.Duncan Sands2010-07-12
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108130 91177308-0d34-0410-b5e6-96231b3b80d8
* Replace copyRegToReg with COPY in FastISelEmitter.Jakob Stoklund Olesen2010-07-11
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108071 91177308-0d34-0410-b5e6-96231b3b80d8
* Reapply bottom-up fast-isel, with several fixes for x86-32:Dan Gohman2010-07-10
| | | | | | | | | | - Check getBytesToPopOnReturn(). - Eschew ST0 and ST1 for return values. - Fix the PIC base register initialization so that it doesn't ever fail to end up the top of the entry block. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108039 91177308-0d34-0410-b5e6-96231b3b80d8
* Start the support for AVX instructions with 256-bit %ymm registers. A couple ofBruno Cardoso Lopes2010-07-09
| | | | | | | | | | | | | | | | | notes: - The instructions are being added with dummy placeholder patterns using some 256 specifiers, this is not meant to work now, but since there are some multiclasses generic enough to accept them, when we go for codegen, the stuff will be already there. - Add VEX encoding bits to support YMM - Add MOVUPS and MOVAPS in the first round - Use "Y" as suffix for those Instructions: MOVUPSYrr, ... - All AVX instructions in X86InstrSSE.td will move soon to a new X86InstrAVX file. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107996 91177308-0d34-0410-b5e6-96231b3b80d8
* --- Reverse-merging r107947 into '.':Bob Wilson2010-07-09
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | U utils/TableGen/FastISelEmitter.cpp --- Reverse-merging r107943 into '.': U test/CodeGen/X86/fast-isel.ll U test/CodeGen/X86/fast-isel-loads.ll U include/llvm/Target/TargetLowering.h U include/llvm/Support/PassNameParser.h U include/llvm/CodeGen/FunctionLoweringInfo.h U include/llvm/CodeGen/CallingConvLower.h U include/llvm/CodeGen/FastISel.h U include/llvm/CodeGen/SelectionDAGISel.h U lib/CodeGen/LLVMTargetMachine.cpp U lib/CodeGen/CallingConvLower.cpp U lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp U lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp U lib/CodeGen/SelectionDAG/FastISel.cpp U lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp U lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp U lib/CodeGen/SelectionDAG/InstrEmitter.cpp U lib/CodeGen/SelectionDAG/TargetLowering.cpp U lib/Target/XCore/XCoreISelLowering.cpp U lib/Target/XCore/XCoreISelLowering.h U lib/Target/X86/X86ISelLowering.cpp U lib/Target/X86/X86FastISel.cpp U lib/Target/X86/X86ISelLowering.h git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107987 91177308-0d34-0410-b5e6-96231b3b80d8
* These changes should have accompanied r107943.Dan Gohman2010-07-09
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107947 91177308-0d34-0410-b5e6-96231b3b80d8
* Changes to ARM tail calls, mostly cosmetic.Dale Johannesen2010-07-08
| | | | | | | | | | | Add explicit testcases for tail calls within the same module. Duplicate some code to humor those who think .w doesn't apply on ARM. Leave this disabled on Thumb1, and add some comments explaining why it's hard and won't gain much. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107851 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert 107840 107839 107813 107804 107800 107797 107791.Dan Gohman2010-07-08
| | | | | | | Debug info intrinsics win for now. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107850 91177308-0d34-0410-b5e6-96231b3b80d8
* Implement the major chunk of PR7195: support for 'callw'Chris Lattner2010-07-07
| | | | | | | | | in the integrated assembler. Still some discussion to be done. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107825 91177308-0d34-0410-b5e6-96231b3b80d8
* Give FunctionLoweringInfo an MBB member, avoiding the need to pass itDan Gohman2010-07-07
| | | | | | | | | around everywhere, and also give it an InsertPt member, to enable isel to operate at an arbitrary position within a block, rather than just appending to a block. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107791 91177308-0d34-0410-b5e6-96231b3b80d8
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