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* ARM assembly parsing and encoding for VMOV/VMVN/VORR/VBIC.i32.Jim Grosbach2011-10-18
* ARM assembly parsing and encoding for VMOV/VMVN/VORR/VBIC.i16.Jim Grosbach2011-10-17
* ARM NEON "vmov.i8" immediate assembly parsing and encoding.Jim Grosbach2011-10-17
* Fix unused variable warning in the rare circumstance that we have no feature-...Owen Anderson2011-10-17
* Pick low-hanging MatchEntry shrinkage fruit.Benjamin Kramer2011-10-17
* Add X86 PEXTR and PDEP instructions.Craig Topper2011-10-16
* Add X86 BZHI instruction as well as BMI2 feature detection.Craig Topper2011-10-16
* Add X86 INVPCID instruction. Add 32/64-bit predicates to INVEPT, INVVPID, VMR...Craig Topper2011-10-16
* Add X86 BEXTR instruction. This instruction uses VEX.vvvv to encode Operand 3...Craig Topper2011-10-16
* Add support for X86 blsr, blsmsk, and blsi instructions. Required extra work ...Craig Topper2011-10-15
* Add X86 ANDN instruction. Including instruction selection.Craig Topper2011-10-14
* Ban rematerializable instructions with side effects.Jakob Stoklund Olesen2011-10-14
* ARM parsing and encoding for the <option> form of LDC/STC instructions.Jim Grosbach2011-10-12
* Remove extra semicolon.Eli Friedman2011-10-11
* Fix disassembling of popcntw. Also remove some code that says it accounts for...Craig Topper2011-10-11
* Emit full ED initializers even for pseudo-instructions.Jakob Stoklund Olesen2011-10-10
* Insert dummy ED table entries for pseudo-instructions.Jakob Stoklund Olesen2011-10-10
* ARM NEON assembly parsing and encoding for VDUP(scalar).Jim Grosbach2011-10-07
* Revert part of r141274. Only need to change encoding for xchg %eax, %eax in 6...Craig Topper2011-10-07
* Remove the Clang tblgen backends from LLVM.Peter Collingbourne2011-10-06
* Fix assembling of xchg %eax, %eax to not use the NOP encoding of 0x90. This w...Craig Topper2011-10-06
* Build system infrastructure for multiple tblgens.Peter Collingbourne2011-10-06
* Remove the TRI::getSubRegisterRegClass() hook.Jakob Stoklund Olesen2011-10-06
* Add TRI::getSubClassWithSubReg(RC, Idx) function.Jakob Stoklund Olesen2011-10-05
* Properly use const_iterator.Jakob Stoklund Olesen2011-10-04
* Teach TableGen to infer missing register classes.Jakob Stoklund Olesen2011-10-04
* TableGen: Store all allocation orders together.Jakob Stoklund Olesen2011-10-04
* TableGen: Privatize CodeGenRegisterClass::TheDef and Name.Jakob Stoklund Olesen2011-10-04
* TableGen: Don't add synthetic Records to the RecordKeeper.Jakob Stoklund Olesen2011-10-04
* Add support in the disassembler for ignoring the L-bit on certain VEX instruc...Craig Topper2011-10-04
* Fix typo in r140954.Craig Topper2011-10-02
* Fix disassembling of INVEPT and INVVPID to take operandsCraig Topper2011-10-01
* Fix disassembler handling of CRC32 which is an odd instruction that uses 0xf2...Craig Topper2011-10-01
* Move TableGen's parser and entry point into a libraryPeter Collingbourne2011-10-01
* Subtarget getFeatureBits() returns a uint64_t, not unsigned.Bob Wilson2011-10-01
* Use precomputed BitVector for CodeGenRegisterClass::hasSubClass().Jakob Stoklund Olesen2011-09-30
* Store sub-class lists as a bit vector.Jakob Stoklund Olesen2011-09-30
* Extract a slightly more general BitVector printer.Jakob Stoklund Olesen2011-09-30
* Compute lists of super-classes in CodeGenRegisterClass.Jakob Stoklund Olesen2011-09-30
* Implement VarListElementInit:: resolveListElementReferenceDavid Greene2011-09-30
* Precompute a bit vector of register sub-classes.Jakob Stoklund Olesen2011-09-30
* Order register classes topologically.Jakob Stoklund Olesen2011-09-30
* Switch to ArrayRef<CodeGenRegisterClass*>.Jakob Stoklund Olesen2011-09-29
* tblgen/ClangDiagnostics: Add support for split default warning "no-werror" andDaniel Dunbar2011-09-29
* ASR #32 is not allowed on Thumb2 USAT and SSAT instructions.Owen Anderson2011-09-26
* Add target hook for pseudo instruction expansion.Jakob Stoklund Olesen2011-09-25
* Don't allow 32-bit only instructions to be disassembled in 64-bit mode. Fixes...Craig Topper2011-09-23
* Restore hasPostISelHook tblgen flag.Andrew Trick2011-09-20
* ARM isel bug fix for adds/subs operands.Andrew Trick2011-09-20
* Remove more of llvmc and dependencies.Eric Christopher2011-09-20
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