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* lit/ProgressBar.py: [PR7919] Improve line wrap for XN-incapable terminals.NAKAMURA Takumi2011-03-15
| | | | | | On Win32 console, emitting char to col#79 causes linefeed, and the cursor will not return to col#79 upper line with backspace. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127696 91177308-0d34-0410-b5e6-96231b3b80d8
* - Add "Bitcast" target instruction property for instructions which performEvan Cheng2011-03-15
| | | | | | | | nothing more than a bitcast. - Teach tablegen to automatically infer "Bitcast" property. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127667 91177308-0d34-0410-b5e6-96231b3b80d8
* X86 table-generator and disassembler support for the AVXSean Callanan2011-03-15
| | | | | | | | | | instruction set. This code adds support for the VEX prefix and for the YMM registers accessible on AVX-enabled architectures. Instruction table support that enables AVX instructions for the disassembler is in an upcoming patch. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127644 91177308-0d34-0410-b5e6-96231b3b80d8
* Ignore isCodeGenOnly instructions when generating diassembly tables.Owen Anderson2011-03-14
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127619 91177308-0d34-0410-b5e6-96231b3b80d8
* Trailing whitespace.Jim Grosbach2011-03-14
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127592 91177308-0d34-0410-b5e6-96231b3b80d8
* Correct small comment order typo.Francois Pichet2011-03-14
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127575 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove no-longer-correct special case for disasm of ARM BL instructions.Jim Grosbach2011-03-12
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127517 91177308-0d34-0410-b5e6-96231b3b80d8
* Pseudo-ize the ARM 'B' instruction.Jim Grosbach2011-03-11
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127510 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove dead code. These ARM instruction definitions no longer exist.Jim Grosbach2011-03-11
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127509 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove dead code. These ARM instruction definitions no longer exist.Jim Grosbach2011-03-11
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127508 91177308-0d34-0410-b5e6-96231b3b80d8
* Pseudo-ize VMOVDcc and VMOVScc.Jim Grosbach2011-03-11
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127506 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove dead code. These ARM instruction definitions don't exist.Jim Grosbach2011-03-11
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127491 91177308-0d34-0410-b5e6-96231b3b80d8
* ARM VDUPfd and VDUPfq can just be patterns. The instruction is the sameJim Grosbach2011-03-11
| | | | | | as for VDUP32d and VDUP32q, respectively. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127489 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove dead code. These ARM instruction definitions don't exist.Jim Grosbach2011-03-11
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127488 91177308-0d34-0410-b5e6-96231b3b80d8
* ARM VDUPLNfq and VDUPLNfd definitions can just be Pat<>s for VDUPLN32qJim Grosbach2011-03-11
| | | | | | and VDUPLN32d, respectively. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127486 91177308-0d34-0410-b5e6-96231b3b80d8
* ARM VREV64df and VREV64qf can just be patterns. The instruction is the sameJim Grosbach2011-03-11
| | | | | | as for VREV64d32 and VREV64q32, respectively. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127485 91177308-0d34-0410-b5e6-96231b3b80d8
* Add missing 'return on failure'. Previously we'd crash after emittingJim Grosbach2011-03-11
| | | | | | the diagnostic. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127480 91177308-0d34-0410-b5e6-96231b3b80d8
* Teach TableGen to pre-calculate register enum values when creating theJim Grosbach2011-03-11
| | | | | | | | | | | | | CodeGenRegister entries. Use this information to more intelligently build the literal register entires in the DAGISel matcher table. Specifically, use a single-byte OPC_EmitRegister entry for registers with a value of less than 256 and OPC_EmitRegister2 entry for registers with a larger value. rdar://9066491 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127456 91177308-0d34-0410-b5e6-96231b3b80d8
* Make the register enum value part of the CodeGenRegister struct.Jim Grosbach2011-03-11
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127448 91177308-0d34-0410-b5e6-96231b3b80d8
* Trailing whitespace.Jim Grosbach2011-03-11
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127447 91177308-0d34-0410-b5e6-96231b3b80d8
* Trailing whitespace.Jim Grosbach2011-03-11
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127446 91177308-0d34-0410-b5e6-96231b3b80d8
* Tidy up since ARM MOVCCi and MOVCCi16 are now pseudos.Jim Grosbach2011-03-11
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127445 91177308-0d34-0410-b5e6-96231b3b80d8
* Properly pseudo-ize MOVCCr and MOVCCs.Jim Grosbach2011-03-10
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127434 91177308-0d34-0410-b5e6-96231b3b80d8
* Memory barrier instructions don't need special handling in tblgen anymore.Jim Grosbach2011-03-10
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127419 91177308-0d34-0410-b5e6-96231b3b80d8
* Stop building PPC parts on OSX. Radar 8637926.Stuart Hastings2011-03-08
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127262 91177308-0d34-0410-b5e6-96231b3b80d8
* Use $(ECHOPATH) to make llvm-lit from llvm-lit.in.NAKAMURA Takumi2011-03-08
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127240 91177308-0d34-0410-b5e6-96231b3b80d8
* Don't show commands.Bill Wendling2011-03-08
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127224 91177308-0d34-0410-b5e6-96231b3b80d8
* Rename the narrow shift right immediate operands to "shr_imm*" operands. AlsoBill Wendling2011-03-07
| | | | | | | | | expand the testing of the narrowing shift right instructions. No functionality change. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127193 91177308-0d34-0410-b5e6-96231b3b80d8
* Don't keep the log files around. Just pipe to a log file instead.Bill Wendling2011-03-07
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127155 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert r127073: "Introduce $(ECHOPATH) to print DOSish path string on MSYS ↵Jakob Stoklund Olesen2011-03-05
| | | | | | | | | | bash for alternative of $(ECHO)." It broke the llvm-gcc-native-mingw32 buildbot, and we need all of them to be green for the 2.9 branch. Takumi, please reapply after we branch, preferably with a fix ;-) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127107 91177308-0d34-0410-b5e6-96231b3b80d8
* utils/lit/lit/TestRunner.py: bash is available with MSYS on Python/W32. Then ↵NAKAMURA Takumi2011-03-05
| | | | | | we can execute "bash tests". git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127074 91177308-0d34-0410-b5e6-96231b3b80d8
* Introduce $(ECHOPATH) to print DOSish path string on MSYS bash for ↵NAKAMURA Takumi2011-03-05
| | | | | | | | alternative of $(ECHO). On mingw and python/w32, lit would not be expected to understand MSYS-style path. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127073 91177308-0d34-0410-b5e6-96231b3b80d8
* On Windows hosts, Python scripts in test/Scripts did not accept binary files ↵NAKAMURA Takumi2011-03-05
| | | | | | from stdin. The environment variable "PYTHONUNBUFFERED" makes stdin as binary. Thanks to Danil Malyshev! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127072 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix the case where the number of jobs is less than theDavid Greene2011-03-04
| | | | | | | | number of threads. In that case make the number of threads equal to the number of jobs and launch one jobs on each thread. This makes things work like make -j. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127045 91177308-0d34-0410-b5e6-96231b3b80d8
* TableGen should not ignore BX instructions for the ARM disassembler. pr9368.Bob Wilson2011-03-03
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126931 91177308-0d34-0410-b5e6-96231b3b80d8
* pr9367: Add missing predicated BLX instructions.Bob Wilson2011-03-03
| | | | | | Patch by Jyun-Yan You, with some minor adjustments and a testcase from me. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126915 91177308-0d34-0410-b5e6-96231b3b80d8
* Teach the clang attribute emitter about InheritableParamAttr.John McCall2011-03-02
| | | | | | | | Intended to be atomic with clang r126828. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126827 91177308-0d34-0410-b5e6-96231b3b80d8
* Fixes warnings emitted by Visual Studio 2010 compiler.Oscar Fuentes2011-03-01
| | | | | | Patch by Erik Olofsson! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126796 91177308-0d34-0410-b5e6-96231b3b80d8
* trailing whitespace.Jim Grosbach2011-03-01
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126733 91177308-0d34-0410-b5e6-96231b3b80d8
* Generalize the register matching code in DAGISel a bit.Jim Grosbach2011-03-01
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126731 91177308-0d34-0410-b5e6-96231b3b80d8
* Narrow right shifts need to encode their immediates differently from a normalBill Wendling2011-03-01
| | | | | | | | | | | shift. 16-bit: imm6<5:3> = '001', 8 - <imm> is encded in imm6<2:0> 32-bit: imm6<5:4> = '01',16 - <imm> is encded in imm6<3:0> 64-bit: imm6<5> = '1', 32 - <imm> is encded in imm6<4:0> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126723 91177308-0d34-0410-b5e6-96231b3b80d8
* Don't install libUnitTestMain.a. It might be useless without gtest headers.NAKAMURA Takumi2011-02-28
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126632 91177308-0d34-0410-b5e6-96231b3b80d8
* A new TableGen feature! (Not turned on just yet.)Bill Wendling2011-02-26
| | | | | | | | | | | | | | | | | | | | | InstAlias<{alias}, {aliasee}>; The InstAlias instruction should be able to go from the MCInst to the {alias}. All of the information is there to match the MCInst with the {aliasee}. From there, it's a simple matter to emit the {alias}, with the correct operands from the {aliasee}. The code this patch generates can be used by the InstPrinter to automatically print out the alias without having to write special C++ code to handle the situation. This is a WIP, and therefore are several limitations. For instance, it cannot handle AsmOperands at the moment. It also doesn't know what to do when two {alias}es match the same {aliasee}. (Currently, it just ignores those two cases and allows the printInstruction method to handle them.) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126538 91177308-0d34-0410-b5e6-96231b3b80d8
* Removed unnecessary dylibs from Apple builds, with or without "lib" prefix.Bob Wilson2011-02-26
| | | | | | Radar 9056686 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126534 91177308-0d34-0410-b5e6-96231b3b80d8
* Add a new "Embedded" makefile target for Apple-style builds.Bob Wilson2011-02-25
| | | | | | This one just installs the default build into a different destination directory. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126533 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix bad comment marker.Stuart Hastings2011-02-25
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126525 91177308-0d34-0410-b5e6-96231b3b80d8
* Add some options for building LLVM in different environments:David Greene2011-02-25
| | | | | | | | | | | | | | | | | | | --force-configure to force running configure before building. --extra-llvm-config-flags --extra-llvm-gcc-config-flags --extra-gcc-config-flags Pass additional argument to the various configure invocations. This also eliminates a default build flavor because explicitly specifying builds could result in build flavors being run repeatedly. Finally, turn off fortran builds for the moment because install appears to be broken. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126510 91177308-0d34-0410-b5e6-96231b3b80d8
* Omit lto.h from the llvmCore result; henceforth, this will be suppliedStuart Hastings2011-02-25
| | | | | | | by clang. Radar 9042056. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126507 91177308-0d34-0410-b5e6-96231b3b80d8
* In utils/TableGen/ClangSACheckersEmitter.cpp, set the 'Hidden' bit for checkers.Argyrios Kyrtzidis2011-02-24
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126436 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix Builder::execute() to more properly pass the desired environmentDavid Greene2011-02-22
| | | | | | | to tools. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126263 91177308-0d34-0410-b5e6-96231b3b80d8
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