From 013bb3dee9d3cb4f2d83e00c3718eb40e2b4d149 Mon Sep 17 00:00:00 2001 From: Bruno Cardoso Lopes Date: Tue, 31 Aug 2010 22:35:05 +0000 Subject: Use x86 specific MOVSLDUP node, add more patterns to match it and remove useless load nodes git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@112661 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/X86/X86ISelLowering.cpp | 9 ++++++--- lib/Target/X86/X86InstrFragmentsSIMD.td | 6 ------ lib/Target/X86/X86InstrSSE.td | 6 +++--- 3 files changed, 9 insertions(+), 12 deletions(-) diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp index d9207d9e06..9d4fb6dfeb 100644 --- a/lib/Target/X86/X86ISelLowering.cpp +++ b/lib/Target/X86/X86ISelLowering.cpp @@ -2587,6 +2587,7 @@ static bool isTargetShuffle(unsigned Opcode) { case X86ISD::MOVLHPS: case X86ISD::MOVHLPS: case X86ISD::MOVSHDUP: + case X86ISD::MOVSLDUP: case X86ISD::MOVSS: case X86ISD::MOVSD: case X86ISD::PUNPCKLDQ: @@ -2600,6 +2601,7 @@ static SDValue getTargetShuffleNode(unsigned Opc, DebugLoc dl, EVT VT, switch(Opc) { default: llvm_unreachable("Unknown x86 shuffle node"); case X86ISD::MOVSHDUP: + case X86ISD::MOVSLDUP: return DAG.getNode(Opc, dl, VT, V1); } @@ -5168,9 +5170,10 @@ X86TargetLowering::LowerVECTOR_SHUFFLE(SDValue Op, SelectionDAG &DAG) const { if (X86::isMOVSHDUPMask(SVOp) && HasSSE3 && V2IsUndef && NumElems == 4) return getTargetShuffleNode(X86ISD::MOVSHDUP, dl, VT, V1, DAG); - if (X86::isMOVSLDUPMask(SVOp) || - X86::isMOVHLPSMask(SVOp) || - X86::isMOVLPMask(SVOp)) + if (X86::isMOVSLDUPMask(SVOp) && HasSSE3 && V2IsUndef && NumElems == 4) + return getTargetShuffleNode(X86ISD::MOVSLDUP, dl, VT, V1, DAG); + + if (X86::isMOVLPMask(SVOp)) return Op; } diff --git a/lib/Target/X86/X86InstrFragmentsSIMD.td b/lib/Target/X86/X86InstrFragmentsSIMD.td index 5b6b65edc2..7f9a39707d 100644 --- a/lib/Target/X86/X86InstrFragmentsSIMD.td +++ b/lib/Target/X86/X86InstrFragmentsSIMD.td @@ -134,7 +134,6 @@ def SDTShuff2OpI : SDTypeProfile<1, 2, [SDTCisVec<0>, def SDTShuff3OpI : SDTypeProfile<1, 3, [SDTCisVec<0>, SDTCisSameAs<0,1>, SDTCisSameAs<0,2>, SDTCisInt<3>]>; -def SDTShuff1OpLd : SDTypeProfile<1, 1, [SDTCisVec<0>, SDTCisPtrTy<1>]>; def SDTShuff2OpLd : SDTypeProfile<1, 2, [SDTCisVec<0>, SDTCisSameAs<0,1>, SDTCisPtrTy<2>]>; @@ -157,11 +156,6 @@ def X86Movddup : SDNode<"X86ISD::MOVDDUP", SDTShuff1Op>; def X86Movshdup : SDNode<"X86ISD::MOVSHDUP", SDTShuff1Op>; def X86Movsldup : SDNode<"X86ISD::MOVSLDUP", SDTShuff1Op>; -def X86MovshdupLd : SDNode<"X86ISD::MOVSHDUP_LD", SDTShuff1OpLd, - [SDNPHasChain, SDNPMayLoad, SDNPMemOperand]>; -def X86MovsldupLd : SDNode<"X86ISD::MOVSLDUP_LD", SDTShuff1OpLd, - [SDNPHasChain, SDNPMayLoad, SDNPMemOperand]>; - def X86Movsd : SDNode<"X86ISD::MOVSD", SDTShuff2Op>; def X86Movss : SDNode<"X86ISD::MOVSS", SDTShuff2Op>; diff --git a/lib/Target/X86/X86InstrSSE.td b/lib/Target/X86/X86InstrSSE.td index 65ec8c292b..bc6278a2b4 100644 --- a/lib/Target/X86/X86InstrSSE.td +++ b/lib/Target/X86/X86InstrSSE.td @@ -5847,7 +5847,7 @@ def : Pat<(v4i32 (X86Movsd VR128:$src1, VR128:$src2)), // Shuffle with MOVSHDUP def : Pat<(v4i32 (X86Movshdup VR128:$src)), (MOVSHDUPrr VR128:$src)>; -def : Pat<(v4i32 (X86Movshdup (bc_v4i32 (memopv2i64 addr:$src)))), +def : Pat<(X86Movshdup (bc_v4i32 (memopv2i64 addr:$src))), (MOVSHDUPrm addr:$src)>; def : Pat<(v4f32 (X86Movshdup VR128:$src)), @@ -5858,12 +5858,12 @@ def : Pat<(X86Movshdup (memopv4f32 addr:$src)), // Shuffle with MOVSLDUP def : Pat<(v4i32 (X86Movsldup VR128:$src)), (MOVSLDUPrr VR128:$src)>; -def : Pat<(v4i32 (X86MovsldupLd addr:$src)), +def : Pat<(X86Movsldup (bc_v4i32 (memopv2i64 addr:$src))), (MOVSLDUPrm addr:$src)>; def : Pat<(v4f32 (X86Movsldup VR128:$src)), (MOVSLDUPrr VR128:$src)>; -def : Pat<(v4f32 (X86MovsldupLd addr:$src)), +def : Pat<(X86Movsldup (memopv4f32 addr:$src)), (MOVSLDUPrm addr:$src)>; // Shuffle with PSHUFHW -- cgit v1.2.3