From 0659b045cff64bac06a4f67e4823db0bf8df7678 Mon Sep 17 00:00:00 2001 From: Bill Wendling Date: Tue, 5 Oct 2010 21:58:12 +0000 Subject: PSHUFW is in SSE, not SSSE3. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115691 91177308-0d34-0410-b5e6-96231b3b80d8 --- test/CodeGen/X86/mmx-builtins.ll | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/test/CodeGen/X86/mmx-builtins.ll b/test/CodeGen/X86/mmx-builtins.ll index ec63fa1a2c..3ac0e4ee4b 100644 --- a/test/CodeGen/X86/mmx-builtins.ll +++ b/test/CodeGen/X86/mmx-builtins.ll @@ -1028,14 +1028,14 @@ entry: ret i64 %5 } -declare x86_mmx @llvm.x86.ssse3.pshuf.w(x86_mmx, i8) nounwind readnone +declare x86_mmx @llvm.x86.sse.pshuf.w(x86_mmx, i8) nounwind readnone define i64 @test21(<1 x i64> %a) nounwind readnone optsize ssp { ; CHECK: pshufw entry: %0 = bitcast <1 x i64> %a to <4 x i16> %1 = bitcast <4 x i16> %0 to x86_mmx - %2 = tail call x86_mmx @llvm.x86.ssse3.pshuf.w(x86_mmx %1, i8 3) nounwind readnone + %2 = tail call x86_mmx @llvm.x86.sse.pshuf.w(x86_mmx %1, i8 3) nounwind readnone %3 = bitcast x86_mmx %2 to <4 x i16> %4 = bitcast <4 x i16> %3 to <1 x i64> %5 = extractelement <1 x i64> %4, i32 0 -- cgit v1.2.3