From 0712283e43a1ae1f2b67c85b7705aa4bceb0bced Mon Sep 17 00:00:00 2001 From: Chris Lattner Date: Fri, 13 Feb 2004 23:36:47 +0000 Subject: There is no need to emit a shift if the size is constant, which is common git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@11420 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/X86/InstSelectSimple.cpp | 21 ++++++++++++++------- lib/Target/X86/X86ISelSimple.cpp | 21 ++++++++++++++------- 2 files changed, 28 insertions(+), 14 deletions(-) diff --git a/lib/Target/X86/InstSelectSimple.cpp b/lib/Target/X86/InstSelectSimple.cpp index 67849e2edb..54aa1ad0d2 100644 --- a/lib/Target/X86/InstSelectSimple.cpp +++ b/lib/Target/X86/InstSelectSimple.cpp @@ -1198,21 +1198,29 @@ void ISel::visitIntrinsicCall(Intrinsic::ID ID, CallInst &CI) { } // Turn the byte code into # iterations - unsigned ByteReg = getReg(CI.getOperand(3)); + unsigned ByteReg; unsigned CountReg; switch (Align & 3) { case 2: // WORD aligned - CountReg = makeAnotherReg(Type::IntTy); - BuildMI(BB, X86::SHRir32, 2, CountReg).addReg(ByteReg).addZImm(1); + if (ConstantInt *I = dyn_cast(CI.getOperand(3))) { + CountReg = getReg(ConstantUInt::get(Type::UIntTy, I->getRawValue()/2)); + } else { + CountReg = makeAnotherReg(Type::IntTy); + BuildMI(BB, X86::SHRir32, 2, CountReg).addReg(ByteReg).addZImm(1); + } break; case 0: // DWORD aligned - CountReg = makeAnotherReg(Type::IntTy); - BuildMI(BB, X86::SHRir32, 2, CountReg).addReg(ByteReg).addZImm(2); + if (ConstantInt *I = dyn_cast(CI.getOperand(3))) { + CountReg = getReg(ConstantUInt::get(Type::UIntTy, I->getRawValue()/4)); + } else { + CountReg = makeAnotherReg(Type::IntTy); + BuildMI(BB, X86::SHRir32, 2, CountReg).addReg(ByteReg).addZImm(2); + } break; case 1: // BYTE aligned case 3: // BYTE aligned - CountReg = ByteReg; + CountReg = getReg(CI.getOperand(3)); break; } @@ -1224,7 +1232,6 @@ void ISel::visitIntrinsicCall(Intrinsic::ID ID, CallInst &CI) { BuildMI(BB, X86::MOVrr32, 1, X86::EDI).addReg(TmpReg1); BuildMI(BB, X86::MOVrr32, 1, X86::ESI).addReg(TmpReg2); - unsigned Bytes = getReg(CI.getOperand(3)); switch (Align & 3) { case 1: // BYTE aligned case 3: // BYTE aligned diff --git a/lib/Target/X86/X86ISelSimple.cpp b/lib/Target/X86/X86ISelSimple.cpp index 67849e2edb..54aa1ad0d2 100644 --- a/lib/Target/X86/X86ISelSimple.cpp +++ b/lib/Target/X86/X86ISelSimple.cpp @@ -1198,21 +1198,29 @@ void ISel::visitIntrinsicCall(Intrinsic::ID ID, CallInst &CI) { } // Turn the byte code into # iterations - unsigned ByteReg = getReg(CI.getOperand(3)); + unsigned ByteReg; unsigned CountReg; switch (Align & 3) { case 2: // WORD aligned - CountReg = makeAnotherReg(Type::IntTy); - BuildMI(BB, X86::SHRir32, 2, CountReg).addReg(ByteReg).addZImm(1); + if (ConstantInt *I = dyn_cast(CI.getOperand(3))) { + CountReg = getReg(ConstantUInt::get(Type::UIntTy, I->getRawValue()/2)); + } else { + CountReg = makeAnotherReg(Type::IntTy); + BuildMI(BB, X86::SHRir32, 2, CountReg).addReg(ByteReg).addZImm(1); + } break; case 0: // DWORD aligned - CountReg = makeAnotherReg(Type::IntTy); - BuildMI(BB, X86::SHRir32, 2, CountReg).addReg(ByteReg).addZImm(2); + if (ConstantInt *I = dyn_cast(CI.getOperand(3))) { + CountReg = getReg(ConstantUInt::get(Type::UIntTy, I->getRawValue()/4)); + } else { + CountReg = makeAnotherReg(Type::IntTy); + BuildMI(BB, X86::SHRir32, 2, CountReg).addReg(ByteReg).addZImm(2); + } break; case 1: // BYTE aligned case 3: // BYTE aligned - CountReg = ByteReg; + CountReg = getReg(CI.getOperand(3)); break; } @@ -1224,7 +1232,6 @@ void ISel::visitIntrinsicCall(Intrinsic::ID ID, CallInst &CI) { BuildMI(BB, X86::MOVrr32, 1, X86::EDI).addReg(TmpReg1); BuildMI(BB, X86::MOVrr32, 1, X86::ESI).addReg(TmpReg2); - unsigned Bytes = getReg(CI.getOperand(3)); switch (Align & 3) { case 1: // BYTE aligned case 3: // BYTE aligned -- cgit v1.2.3