From 2544f221c5f4047d7bdf10ec911c86a1d8be4a29 Mon Sep 17 00:00:00 2001 From: Hal Finkel Date: Thu, 28 Mar 2013 20:23:46 +0000 Subject: Only enable 64-bit bswap DAG combines for PPC64 Compiling in 32-bit mode on a P7 would assert after 64-bit DAG combines were added for bswap with load/store. This is because these combines are really only valid in 64-bit mode, regardless of the CPU (and this was not being checked). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178286 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/PowerPC/PPCISelLowering.cpp | 2 ++ test/CodeGen/PowerPC/bswap-load-store.ll | 1 + 2 files changed, 3 insertions(+) diff --git a/lib/Target/PowerPC/PPCISelLowering.cpp b/lib/Target/PowerPC/PPCISelLowering.cpp index e8b94bca68..74e811b35c 100644 --- a/lib/Target/PowerPC/PPCISelLowering.cpp +++ b/lib/Target/PowerPC/PPCISelLowering.cpp @@ -6606,6 +6606,7 @@ SDValue PPCTargetLowering::PerformDAGCombine(SDNode *N, (N->getOperand(1).getValueType() == MVT::i32 || N->getOperand(1).getValueType() == MVT::i16 || (TM.getSubtarget().hasLDBRX() && + TM.getSubtarget().isPPC64() && N->getOperand(1).getValueType() == MVT::i64))) { SDValue BSwapOp = N->getOperand(1).getOperand(0); // Do an any-extend to 32-bits if this is a half-word input. @@ -6629,6 +6630,7 @@ SDValue PPCTargetLowering::PerformDAGCombine(SDNode *N, N->getOperand(0).hasOneUse() && (N->getValueType(0) == MVT::i32 || N->getValueType(0) == MVT::i16 || (TM.getSubtarget().hasLDBRX() && + TM.getSubtarget().isPPC64() && N->getValueType(0) == MVT::i64))) { SDValue Load = N->getOperand(0); LoadSDNode *LD = cast(Load); diff --git a/test/CodeGen/PowerPC/bswap-load-store.ll b/test/CodeGen/PowerPC/bswap-load-store.ll index 2aae4150ef..6b60fdd6e1 100644 --- a/test/CodeGen/PowerPC/bswap-load-store.ll +++ b/test/CodeGen/PowerPC/bswap-load-store.ll @@ -1,6 +1,7 @@ ; RUN: llc < %s -march=ppc32 | FileCheck %s -check-prefix=X32 ; RUN: llc < %s -march=ppc64 | FileCheck %s -check-prefix=X64 ; RUN: llc < %s -march=ppc64 -mcpu=pwr7 | FileCheck %s -check-prefix=PWR7 +; RUN: llc < %s -march=ppc32 -mcpu=pwr7 | FileCheck %s -check-prefix=X32 define void @STWBRX(i32 %i, i8* %ptr, i32 %off) { -- cgit v1.2.3