From 5c1983b99f6334f3ffeb763029a5aaa786ef7faa Mon Sep 17 00:00:00 2001
From: Venkatraman Govindaraju <venkatra@cs.wisc.edu>
Date: Wed, 29 Jan 2014 03:35:08 +0000
Subject: [SparcV9] Use correct register class (I64RegClass) to hold the
 address of  _GLOBAL_OFFSET_TABLE_ in sparcv9.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200368 91177308-0d34-0410-b5e6-96231b3b80d8
---
 lib/Target/Sparc/SparcInstrInfo.cpp  |  5 +++--
 lib/Target/Sparc/SparcInstrInfo.td   |  2 +-
 test/CodeGen/SPARC/2009-08-28-PIC.ll | 40 ++++++++++++++++++++++++++++++++++--
 3 files changed, 42 insertions(+), 5 deletions(-)

diff --git a/lib/Target/Sparc/SparcInstrInfo.cpp b/lib/Target/Sparc/SparcInstrInfo.cpp
index c10b5b3005..6ecf81de83 100644
--- a/lib/Target/Sparc/SparcInstrInfo.cpp
+++ b/lib/Target/Sparc/SparcInstrInfo.cpp
@@ -431,8 +431,9 @@ unsigned SparcInstrInfo::getGlobalBaseReg(MachineFunction *MF) const
   MachineBasicBlock::iterator MBBI = FirstMBB.begin();
   MachineRegisterInfo &RegInfo = MF->getRegInfo();
 
-  GlobalBaseReg = RegInfo.createVirtualRegister(&SP::IntRegsRegClass);
-
+  const TargetRegisterClass *PtrRC =
+    Subtarget.is64Bit() ? &SP::I64RegsRegClass : &SP::IntRegsRegClass;
+  GlobalBaseReg = RegInfo.createVirtualRegister(PtrRC);
 
   DebugLoc dl;
 
diff --git a/lib/Target/Sparc/SparcInstrInfo.td b/lib/Target/Sparc/SparcInstrInfo.td
index f6a5f722b0..4aebdae6a7 100644
--- a/lib/Target/Sparc/SparcInstrInfo.td
+++ b/lib/Target/Sparc/SparcInstrInfo.td
@@ -180,7 +180,7 @@ def tlscall       : SDNode<"SPISD::TLS_CALL", SDT_SPCall,
                             [SDNPHasChain, SDNPOptInGlue, SDNPOutGlue,
                              SDNPVariadic]>;
 
-def getPCX        : Operand<i32> {
+def getPCX        : Operand<iPTR> {
   let PrintMethod = "printGetPCX";
 }
 
diff --git a/test/CodeGen/SPARC/2009-08-28-PIC.ll b/test/CodeGen/SPARC/2009-08-28-PIC.ll
index a2ba0d02d4..b004b11b85 100644
--- a/test/CodeGen/SPARC/2009-08-28-PIC.ll
+++ b/test/CodeGen/SPARC/2009-08-28-PIC.ll
@@ -1,9 +1,45 @@
-; RUN: llc -march=sparc --relocation-model=pic < %s | grep _GLOBAL_OFFSET_TABLE_
+; RUN: llc -march=sparc --relocation-model=pic < %s | FileCheck %s --check-prefix=V8
+; RUN: llc -march=sparcv9 --relocation-model=pic < %s | FileCheck %s --check-prefix=V9
+; RUN: llc -march=sparc   --relocation-model=pic < %s -O0 | FileCheck %s --check-prefix=V8UNOPT
+; RUN: llc -march=sparcv9 --relocation-model=pic < %s -O0 | FileCheck %s --check-prefix=V9UNOPT
+
+
+; V8-LABEL: func
+; V8:  _GLOBAL_OFFSET_TABLE_
+
+; V9-LABEL: func
+; V9:  _GLOBAL_OFFSET_TABLE_
 
 @foo = global i32 0                               ; <i32*> [#uses=1]
 
-define i32 @func() nounwind readonly {
+define i32 @func(i32 %a) nounwind readonly {
 entry:
   %0 = load i32* @foo, align 4                    ; <i32> [#uses=1]
   ret i32 %0
 }
+
+; V8UNOPT-LABEL: test_spill
+; V8UNOPT:       sethi %hi(_GLOBAL_OFFSET_TABLE_+{{.+}}), [[R:%[goli][0-7]]]
+; V8UNOPT:       or [[R]], %lo(_GLOBAL_OFFSET_TABLE_+{{.+}}), [[R]]
+; V8UNOPT:       add [[R]], %o7, [[R]]
+; V8UNOPT:       st [[R]], [%fp+{{.+}}]
+
+; V9UNOPT-LABEL: test_spill
+; V9UNOPT:       sethi %hi(_GLOBAL_OFFSET_TABLE_+{{.+}}), [[R:%[goli][0-7]]]
+; V9UNOPT:       or [[R]], %lo(_GLOBAL_OFFSET_TABLE_+{{.+}}), [[R]]
+; V9UNOPT:       add [[R]], %o7, [[R]]
+; V9UNOPT:       stx [[R]], [%fp+{{.+}}]
+
+define i32 @test_spill(i32 %a, i32 %b) {
+entry:
+  %cmp = icmp eq i32 %b, 0
+  br i1 %cmp, label %if.then, label %if.end
+
+if.then:
+  %ret =  load i32* @foo, align 4
+  ret i32 %ret
+
+if.end:
+  %add = add nsw i32 %b, %a
+  ret i32 %add
+}
-- 
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