From 6b67ffd68bb2e555b1b512a809f3c82c68f3debe Mon Sep 17 00:00:00 2001 From: Rafael Espindola Date: Thu, 16 May 2013 21:02:15 +0000 Subject: Remove addFrameMove. Now that we have good testing, remove addFrameMove and create cfi instructions directly. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182052 91177308-0d34-0410-b5e6-96231b3b80d8 --- include/llvm/CodeGen/MachineModuleInfo.h | 5 ++-- lib/CodeGen/MachineModuleInfo.cpp | 33 ------------------------- lib/Target/AArch64/AArch64FrameLowering.cpp | 24 +++++++++--------- lib/Target/Mips/Mips16FrameLowering.cpp | 21 +++++++--------- lib/Target/Mips/MipsSEFrameLowering.cpp | 37 ++++++++++++++-------------- lib/Target/PowerPC/PPCFrameLowering.cpp | 38 ++++++++++++++--------------- lib/Target/SystemZ/SystemZFrameLowering.cpp | 25 +++++++++---------- lib/Target/X86/X86FrameLowering.cpp | 35 ++++++++++++-------------- 8 files changed, 88 insertions(+), 130 deletions(-) diff --git a/include/llvm/CodeGen/MachineModuleInfo.h b/include/llvm/CodeGen/MachineModuleInfo.h index 95eb1e40dc..186017c906 100644 --- a/include/llvm/CodeGen/MachineModuleInfo.h +++ b/include/llvm/CodeGen/MachineModuleInfo.h @@ -238,8 +238,9 @@ public: return FrameInstructions; } - void addFrameMove(MCSymbol *Label, const MachineLocation &Dst, - const MachineLocation &Src); + void addFrameInst(const MCCFIInstruction &Inst) { + FrameInstructions.push_back(Inst); + } /// getCompactUnwindEncoding - Returns the compact unwind encoding for a /// function if the target supports the encoding. This encoding replaces a diff --git a/lib/CodeGen/MachineModuleInfo.cpp b/lib/CodeGen/MachineModuleInfo.cpp index 74cf9f50df..a916bd6412 100644 --- a/lib/CodeGen/MachineModuleInfo.cpp +++ b/lib/CodeGen/MachineModuleInfo.cpp @@ -268,39 +268,6 @@ MachineModuleInfo::MachineModuleInfo() MachineModuleInfo::~MachineModuleInfo() { } -static MCCFIInstruction convertMoveToCFI(const MCRegisterInfo &MRI, - MCSymbol *Label, - const MachineLocation &Dst, - const MachineLocation &Src) { - // If advancing cfa. - if (Dst.isReg() && Dst.getReg() == MachineLocation::VirtualFP) { - if (Src.getReg() == MachineLocation::VirtualFP) - return MCCFIInstruction::createDefCfaOffset(Label, Src.getOffset()); - // Reg + Offset - return MCCFIInstruction::createDefCfa( - Label, MRI.getDwarfRegNum(Src.getReg(), true), -Src.getOffset()); - } - - if (Src.isReg() && Src.getReg() == MachineLocation::VirtualFP) { - assert(Dst.isReg() && "Machine move not supported yet."); - return MCCFIInstruction::createDefCfaRegister( - Label, MRI.getDwarfRegNum(Dst.getReg(), true)); - } - - assert(!Dst.isReg() && "Machine move not supported yet."); - return MCCFIInstruction::createOffset( - Label, MRI.getDwarfRegNum(Src.getReg(), true), Dst.getOffset()); -} - - -void MachineModuleInfo::addFrameMove(MCSymbol *Label, - const MachineLocation &Dst, - const MachineLocation &Src) { - MCCFIInstruction I = - convertMoveToCFI(Context.getRegisterInfo(), Label, Dst, Src); - FrameInstructions.push_back(I); -} - bool MachineModuleInfo::doInitialization(Module &M) { ObjFileMMI = 0; diff --git a/lib/Target/AArch64/AArch64FrameLowering.cpp b/lib/Target/AArch64/AArch64FrameLowering.cpp index 0474aaf487..8b907b2fb3 100644 --- a/lib/Target/AArch64/AArch64FrameLowering.cpp +++ b/lib/Target/AArch64/AArch64FrameLowering.cpp @@ -54,6 +54,7 @@ void AArch64FrameLowering::emitPrologue(MachineFunction &MF) const { DebugLoc DL = MBBI != MBB.end() ? MBBI->getDebugLoc() : DebugLoc(); MachineModuleInfo &MMI = MF.getMMI(); + const MCRegisterInfo &MRI = MMI.getContext().getRegisterInfo(); bool NeedsFrameMoves = MMI.hasDebugInfo() || MF.getFunction()->needsUnwindTableEntry(); @@ -96,8 +97,9 @@ void AArch64FrameLowering::emitPrologue(MachineFunction &MF) const { .addSym(SPLabel); MachineLocation Dst(MachineLocation::VirtualFP); - MachineLocation Src(AArch64::XSP, NumInitialBytes); - MMI.addFrameMove(SPLabel, Dst, Src); + unsigned Reg = MRI.getDwarfRegNum(AArch64::XSP, true); + MMI.addFrameInst( + MCCFIInstruction::createDefCfa(SPLabel, Reg, -NumInitialBytes)); } // Otherwise we need to set the frame pointer and/or add a second stack @@ -130,9 +132,9 @@ void AArch64FrameLowering::emitPrologue(MachineFunction &MF) const { MCSymbol *FPLabel = MMI.getContext().CreateTempSymbol(); BuildMI(MBB, MBBI, DL, TII.get(TargetOpcode::PROLOG_LABEL)) .addSym(FPLabel); - MachineLocation Dst(MachineLocation::VirtualFP); - MachineLocation Src(AArch64::X29, -MFI->getObjectOffset(X29FrameIdx)); - MMI.addFrameMove(FPLabel, Dst, Src); + unsigned Reg = MRI.getDwarfRegNum(AArch64::X29, true); + unsigned Offset = MFI->getObjectOffset(X29FrameIdx); + MMI.addFrameInst(MCCFIInstruction::createDefCfa(FPLabel, Reg, Offset)); } FPNeedsSetting = false; @@ -163,8 +165,9 @@ void AArch64FrameLowering::emitPrologue(MachineFunction &MF) const { .addSym(CSLabel); MachineLocation Dst(MachineLocation::VirtualFP); - MachineLocation Src(AArch64::XSP, NumResidualBytes + NumInitialBytes); - MMI.addFrameMove(CSLabel, Dst, Src); + unsigned Reg = MRI.getDwarfRegNum(AArch64::XSP, true); + unsigned Offset = NumResidualBytes + NumInitialBytes; + MMI.addFrameInst(MCCFIInstruction::createDefCfa(CSLabel, Reg, -Offset)); } // And any callee-saved registers (it's fine to leave them to the end here, @@ -179,10 +182,9 @@ void AArch64FrameLowering::emitPrologue(MachineFunction &MF) const { for (std::vector::const_iterator I = CSI.begin(), E = CSI.end(); I != E; ++I) { - MachineLocation Dst(MachineLocation::VirtualFP, - MFI->getObjectOffset(I->getFrameIdx())); - MachineLocation Src(I->getReg()); - MMI.addFrameMove(CSLabel, Dst, Src); + unsigned Offset = MFI->getObjectOffset(I->getFrameIdx()); + unsigned Reg = MRI.getDwarfRegNum(I->getReg(), true); + MMI.addFrameInst(MCCFIInstruction::createOffset(CSLabel, Reg, Offset)); } } } diff --git a/lib/Target/Mips/Mips16FrameLowering.cpp b/lib/Target/Mips/Mips16FrameLowering.cpp index d9a7487bf7..e180c49236 100644 --- a/lib/Target/Mips/Mips16FrameLowering.cpp +++ b/lib/Target/Mips/Mips16FrameLowering.cpp @@ -40,6 +40,7 @@ void Mips16FrameLowering::emitPrologue(MachineFunction &MF) const { if (StackSize == 0 && !MFI->adjustsStack()) return; MachineModuleInfo &MMI = MF.getMMI(); + const MCRegisterInfo &MRI = MMI.getContext().getRegisterInfo(); MachineLocation DstML, SrcML; // Adjust stack. @@ -49,24 +50,20 @@ void Mips16FrameLowering::emitPrologue(MachineFunction &MF) const { MCSymbol *AdjustSPLabel = MMI.getContext().CreateTempSymbol(); BuildMI(MBB, MBBI, dl, TII.get(TargetOpcode::PROLOG_LABEL)).addSym(AdjustSPLabel); - DstML = MachineLocation(MachineLocation::VirtualFP); - SrcML = MachineLocation(MachineLocation::VirtualFP, -StackSize); - MMI.addFrameMove(AdjustSPLabel, DstML, SrcML); + MMI.addFrameInst( + MCCFIInstruction::createDefCfaOffset(AdjustSPLabel, -StackSize)); MCSymbol *CSLabel = MMI.getContext().CreateTempSymbol(); BuildMI(MBB, MBBI, dl, TII.get(TargetOpcode::PROLOG_LABEL)).addSym(CSLabel); - DstML = MachineLocation(MachineLocation::VirtualFP, -8); - SrcML = MachineLocation(Mips::S1); - MMI.addFrameMove(CSLabel, DstML, SrcML); + unsigned S1 = MRI.getDwarfRegNum(Mips::S1, true); + MMI.addFrameInst(MCCFIInstruction::createOffset(CSLabel, S1, -8)); - DstML = MachineLocation(MachineLocation::VirtualFP, -12); - SrcML = MachineLocation(Mips::S0); - MMI.addFrameMove(CSLabel, DstML, SrcML); + unsigned S0 = MRI.getDwarfRegNum(Mips::S0, true); + MMI.addFrameInst(MCCFIInstruction::createOffset(CSLabel, S0, -12)); - DstML = MachineLocation(MachineLocation::VirtualFP, -4); - SrcML = MachineLocation(Mips::RA); - MMI.addFrameMove(CSLabel, DstML, SrcML); + unsigned RA = MRI.getDwarfRegNum(Mips::RA, true); + MMI.addFrameInst(MCCFIInstruction::createOffset(CSLabel, RA, -4)); if (hasFP(MF)) BuildMI(MBB, MBBI, dl, TII.get(Mips::MoveR3216), Mips::S0) diff --git a/lib/Target/Mips/MipsSEFrameLowering.cpp b/lib/Target/Mips/MipsSEFrameLowering.cpp index 535c17cd62..fd6ac99061 100644 --- a/lib/Target/Mips/MipsSEFrameLowering.cpp +++ b/lib/Target/Mips/MipsSEFrameLowering.cpp @@ -262,6 +262,7 @@ void MipsSEFrameLowering::emitPrologue(MachineFunction &MF) const { if (StackSize == 0 && !MFI->adjustsStack()) return; MachineModuleInfo &MMI = MF.getMMI(); + const MCRegisterInfo &MRI = MMI.getContext().getRegisterInfo(); MachineLocation DstML, SrcML; // Adjust stack. @@ -271,9 +272,8 @@ void MipsSEFrameLowering::emitPrologue(MachineFunction &MF) const { MCSymbol *AdjustSPLabel = MMI.getContext().CreateTempSymbol(); BuildMI(MBB, MBBI, dl, TII.get(TargetOpcode::PROLOG_LABEL)).addSym(AdjustSPLabel); - DstML = MachineLocation(MachineLocation::VirtualFP); - SrcML = MachineLocation(MachineLocation::VirtualFP, -StackSize); - MMI.addFrameMove(AdjustSPLabel, DstML, SrcML); + MMI.addFrameInst( + MCCFIInstruction::createDefCfaOffset(AdjustSPLabel, -StackSize)); const std::vector &CSI = MFI->getCalleeSavedInfo(); @@ -297,21 +297,22 @@ void MipsSEFrameLowering::emitPrologue(MachineFunction &MF) const { // If Reg is a double precision register, emit two cfa_offsets, // one for each of the paired single precision registers. if (Mips::AFGR64RegClass.contains(Reg)) { - MachineLocation DstML0(MachineLocation::VirtualFP, Offset); - MachineLocation DstML1(MachineLocation::VirtualFP, Offset + 4); - MachineLocation SrcML0(RegInfo->getSubReg(Reg, Mips::sub_fpeven)); - MachineLocation SrcML1(RegInfo->getSubReg(Reg, Mips::sub_fpodd)); + unsigned Reg0 = + MRI.getDwarfRegNum(RegInfo->getSubReg(Reg, Mips::sub_fpeven), true); + unsigned Reg1 = + MRI.getDwarfRegNum(RegInfo->getSubReg(Reg, Mips::sub_fpodd), true); if (!STI.isLittle()) - std::swap(SrcML0, SrcML1); + std::swap(Reg0, Reg1); - MMI.addFrameMove(CSLabel, DstML0, SrcML0); - MMI.addFrameMove(CSLabel, DstML1, SrcML1); + MMI.addFrameInst( + MCCFIInstruction::createOffset(CSLabel, Reg0, Offset)); + MMI.addFrameInst( + MCCFIInstruction::createOffset(CSLabel, Reg1, Offset + 4)); } else { // Reg is either in CPURegs or FGR32. - DstML = MachineLocation(MachineLocation::VirtualFP, Offset); - SrcML = MachineLocation(Reg); - MMI.addFrameMove(CSLabel, DstML, SrcML); + MMI.addFrameInst(MCCFIInstruction::createOffset( + CSLabel, MRI.getDwarfRegNum(Reg, 1), Offset)); } } } @@ -334,9 +335,8 @@ void MipsSEFrameLowering::emitPrologue(MachineFunction &MF) const { TII.get(TargetOpcode::PROLOG_LABEL)).addSym(CSLabel2); for (int I = 0; I < 4; ++I) { int64_t Offset = MFI->getObjectOffset(MipsFI->getEhDataRegFI(I)); - DstML = MachineLocation(MachineLocation::VirtualFP, Offset); - SrcML = MachineLocation(ehDataReg(I)); - MMI.addFrameMove(CSLabel2, DstML, SrcML); + unsigned Reg = MRI.getDwarfRegNum(ehDataReg(I), true); + MMI.addFrameInst(MCCFIInstruction::createOffset(CSLabel2, Reg, Offset)); } } @@ -349,9 +349,8 @@ void MipsSEFrameLowering::emitPrologue(MachineFunction &MF) const { MCSymbol *SetFPLabel = MMI.getContext().CreateTempSymbol(); BuildMI(MBB, MBBI, dl, TII.get(TargetOpcode::PROLOG_LABEL)).addSym(SetFPLabel); - DstML = MachineLocation(FP); - SrcML = MachineLocation(MachineLocation::VirtualFP); - MMI.addFrameMove(SetFPLabel, DstML, SrcML); + MMI.addFrameInst(MCCFIInstruction::createDefCfaRegister( + SetFPLabel, MRI.getDwarfRegNum(FP, true))); } } diff --git a/lib/Target/PowerPC/PPCFrameLowering.cpp b/lib/Target/PowerPC/PPCFrameLowering.cpp index 375919486c..dabe61348d 100644 --- a/lib/Target/PowerPC/PPCFrameLowering.cpp +++ b/lib/Target/PowerPC/PPCFrameLowering.cpp @@ -334,6 +334,7 @@ void PPCFrameLowering::emitPrologue(MachineFunction &MF) const { *static_cast(MF.getTarget().getInstrInfo()); MachineModuleInfo &MMI = MF.getMMI(); + const MCRegisterInfo &MRI = MMI.getContext().getRegisterInfo(); DebugLoc dl; bool needsFrameMoves = MMI.hasDebugInfo() || MF.getFunction()->needsUnwindTableEntry(); @@ -524,20 +525,21 @@ void PPCFrameLowering::emitPrologue(MachineFunction &MF) const { // Show update of SP. assert(NegFrameSize); - MachineLocation SPDst(MachineLocation::VirtualFP); - MachineLocation SPSrc(MachineLocation::VirtualFP, NegFrameSize); - MMI.addFrameMove(FrameLabel, SPDst, SPSrc); + MMI.addFrameInst( + MCCFIInstruction::createDefCfaOffset(FrameLabel, NegFrameSize)); if (HasFP) { - MachineLocation FPDst(MachineLocation::VirtualFP, FPOffset); - MachineLocation FPSrc(isPPC64 ? PPC::X31 : PPC::R31); - MMI.addFrameMove(FrameLabel, FPDst, FPSrc); + unsigned Reg = isPPC64 ? PPC::X31 : PPC::R31; + Reg = MRI.getDwarfRegNum(Reg, true); + MMI.addFrameInst( + MCCFIInstruction::createOffset(FrameLabel, Reg, FPOffset)); } if (MustSaveLR) { - MachineLocation LRDst(MachineLocation::VirtualFP, LROffset); - MachineLocation LRSrc(isPPC64 ? PPC::LR8 : PPC::LR); - MMI.addFrameMove(FrameLabel, LRDst, LRSrc); + unsigned Reg = isPPC64 ? PPC::LR8 : PPC::LR; + Reg = MRI.getDwarfRegNum(Reg, true); + MMI.addFrameInst( + MCCFIInstruction::createOffset(FrameLabel, Reg, LROffset)); } } @@ -561,10 +563,10 @@ void PPCFrameLowering::emitPrologue(MachineFunction &MF) const { // Mark effective beginning of when frame pointer is ready. BuildMI(MBB, MBBI, dl, TII.get(PPC::PROLOG_LABEL)).addSym(ReadyLabel); - MachineLocation FPDst(HasFP ? (isPPC64 ? PPC::X31 : PPC::R31) : - (isPPC64 ? PPC::X1 : PPC::R1)); - MachineLocation FPSrc(MachineLocation::VirtualFP); - MMI.addFrameMove(ReadyLabel, FPDst, FPSrc); + unsigned Reg = HasFP ? (isPPC64 ? PPC::X31 : PPC::R31) + : (isPPC64 ? PPC::X1 : PPC::R1); + Reg = MRI.getDwarfRegNum(Reg, true); + MMI.addFrameInst(MCCFIInstruction::createDefCfaRegister(ReadyLabel, Reg)); } } @@ -594,16 +596,14 @@ void PPCFrameLowering::emitPrologue(MachineFunction &MF) const { if (Subtarget.isSVR4ABI() && Subtarget.isPPC64() && (PPC::CR2 <= Reg && Reg <= PPC::CR4)) { - MachineLocation CSDst(PPC::X1, 8); - MachineLocation CSSrc(PPC::CR2); - MMI.addFrameMove(Label, CSDst, CSSrc); + MMI.addFrameInst(MCCFIInstruction::createOffset( + Label, MRI.getDwarfRegNum(PPC::CR2, true), 8)); continue; } int Offset = MFI->getObjectOffset(CSI[I].getFrameIdx()); - MachineLocation CSDst(MachineLocation::VirtualFP, Offset); - MachineLocation CSSrc(Reg); - MMI.addFrameMove(Label, CSDst, CSSrc); + MMI.addFrameInst(MCCFIInstruction::createOffset( + Label, MRI.getDwarfRegNum(Reg, true), Offset)); } } } diff --git a/lib/Target/SystemZ/SystemZFrameLowering.cpp b/lib/Target/SystemZ/SystemZFrameLowering.cpp index ab1d45f128..53439c9d43 100644 --- a/lib/Target/SystemZ/SystemZFrameLowering.cpp +++ b/lib/Target/SystemZ/SystemZFrameLowering.cpp @@ -297,6 +297,7 @@ void SystemZFrameLowering::emitPrologue(MachineFunction &MF) const { SystemZMachineFunctionInfo *ZFI = MF.getInfo(); MachineBasicBlock::iterator MBBI = MBB.begin(); MachineModuleInfo &MMI = MF.getMMI(); + const MCRegisterInfo &MRI = MMI.getContext().getRegisterInfo(); const std::vector &CSI = MFFrame->getCalleeSavedInfo(); bool HasFP = hasFP(MF); DebugLoc DL = MBBI != MBB.end() ? MBBI->getDebugLoc() : DebugLoc(); @@ -320,9 +321,8 @@ void SystemZFrameLowering::emitPrologue(MachineFunction &MF) const { unsigned Reg = I->getReg(); if (SystemZ::GR64BitRegClass.contains(Reg)) { int64_t Offset = SPOffsetFromCFA + RegSpillOffsets[Reg]; - MachineLocation StackSlot(MachineLocation::VirtualFP, Offset); - MachineLocation RegValue(Reg); - MMI.addFrameMove(GPRSaveLabel, StackSlot, RegValue); + MMI.addFrameInst(MCCFIInstruction::createOffset( + GPRSaveLabel, MRI.getDwarfRegNum(Reg, true), Offset)); } } } @@ -337,9 +337,8 @@ void SystemZFrameLowering::emitPrologue(MachineFunction &MF) const { MCSymbol *AdjustSPLabel = MMI.getContext().CreateTempSymbol(); BuildMI(MBB, MBBI, DL, ZII->get(TargetOpcode::PROLOG_LABEL)) .addSym(AdjustSPLabel); - MachineLocation FPDest(MachineLocation::VirtualFP); - MachineLocation FPSrc(MachineLocation::VirtualFP, SPOffsetFromCFA + Delta); - MMI.addFrameMove(AdjustSPLabel, FPDest, FPSrc); + MMI.addFrameInst(MCCFIInstruction::createDefCfaOffset( + AdjustSPLabel, SPOffsetFromCFA + Delta)); SPOffsetFromCFA += Delta; } @@ -352,9 +351,9 @@ void SystemZFrameLowering::emitPrologue(MachineFunction &MF) const { MCSymbol *SetFPLabel = MMI.getContext().CreateTempSymbol(); BuildMI(MBB, MBBI, DL, ZII->get(TargetOpcode::PROLOG_LABEL)) .addSym(SetFPLabel); - MachineLocation HardFP(SystemZ::R11D); - MachineLocation VirtualFP(MachineLocation::VirtualFP); - MMI.addFrameMove(SetFPLabel, HardFP, VirtualFP); + unsigned HardFP = MRI.getDwarfRegNum(SystemZ::R11D, true); + MMI.addFrameInst( + MCCFIInstruction::createDefCfaRegister(SetFPLabel, HardFP)); // Mark the FramePtr as live at the beginning of every block except // the entry block. (We'll have marked R11 as live on entry when @@ -380,12 +379,10 @@ void SystemZFrameLowering::emitPrologue(MachineFunction &MF) const { // Add CFI for the this save. if (!FPRSaveLabel) FPRSaveLabel = MMI.getContext().CreateTempSymbol(); - unsigned Reg = I->getReg(); + unsigned Reg = MRI.getDwarfRegNum(I->getReg(), true); int64_t Offset = getFrameIndexOffset(MF, I->getFrameIdx()); - MachineLocation Slot(MachineLocation::VirtualFP, - SPOffsetFromCFA + Offset); - MachineLocation RegValue(Reg); - MMI.addFrameMove(FPRSaveLabel, Slot, RegValue); + MMI.addFrameInst(MCCFIInstruction::createOffset( + FPRSaveLabel, Reg, SPOffsetFromCFA + Offset)); } } // Complete the CFI for the FPR saves, modelling them as taking effect diff --git a/lib/Target/X86/X86FrameLowering.cpp b/lib/Target/X86/X86FrameLowering.cpp index 88359da036..3061117c4d 100644 --- a/lib/Target/X86/X86FrameLowering.cpp +++ b/lib/Target/X86/X86FrameLowering.cpp @@ -307,6 +307,7 @@ void X86FrameLowering::emitCalleeSavedFrameMoves(MachineFunction &MF, unsigned FramePtr) const { MachineFrameInfo *MFI = MF.getFrameInfo(); MachineModuleInfo &MMI = MF.getMMI(); + const MCRegisterInfo &MRI = MMI.getContext().getRegisterInfo(); // Add callee saved registers to move list. const std::vector &CSI = MFI->getCalleeSavedInfo(); @@ -359,9 +360,8 @@ void X86FrameLowering::emitCalleeSavedFrameMoves(MachineFunction &MF, if (HasFP && FramePtr == Reg) continue; - MachineLocation CSDst(MachineLocation::VirtualFP, Offset); - MachineLocation CSSrc(Reg); - MMI.addFrameMove(Label, CSDst, CSSrc); + unsigned DwarfReg = MRI.getDwarfRegNum(Reg, true); + MMI.addFrameInst(MCCFIInstruction::createOffset(Label, DwarfReg, Offset)); } } @@ -764,14 +764,13 @@ void X86FrameLowering::emitPrologue(MachineFunction &MF) const { // Define the current CFA rule to use the provided offset. assert(StackSize); - MachineLocation SPDst(MachineLocation::VirtualFP); - MachineLocation SPSrc(MachineLocation::VirtualFP, 2 * stackGrowth); - MMI.addFrameMove(FrameLabel, SPDst, SPSrc); + MMI.addFrameInst( + MCCFIInstruction::createDefCfaOffset(FrameLabel, 2 * stackGrowth)); // Change the rule for the FramePtr to be an "offset" rule. - MachineLocation FPDst(MachineLocation::VirtualFP, 2 * stackGrowth); - MachineLocation FPSrc(FramePtr); - MMI.addFrameMove(FrameLabel, FPDst, FPSrc); + unsigned DwarfFramePtr = RegInfo->getDwarfRegNum(FramePtr, true); + MMI.addFrameInst(MCCFIInstruction::createOffset(FrameLabel, DwarfFramePtr, + 2 * stackGrowth)); } // Update EBP with the new base value. @@ -787,9 +786,9 @@ void X86FrameLowering::emitPrologue(MachineFunction &MF) const { .addSym(FrameLabel); // Define the current CFA to use the EBP/RBP register. - MachineLocation FPDst(FramePtr); - MachineLocation FPSrc(MachineLocation::VirtualFP); - MMI.addFrameMove(FrameLabel, FPDst, FPSrc); + unsigned DwarfFramePtr = RegInfo->getDwarfRegNum(FramePtr, true); + MMI.addFrameInst( + MCCFIInstruction::createDefCfaRegister(FrameLabel, DwarfFramePtr)); } // Mark the FramePtr as live-in in every block except the entry. @@ -818,10 +817,8 @@ void X86FrameLowering::emitPrologue(MachineFunction &MF) const { // Define the current CFA rule to use the provided offset. assert(StackSize); - unsigned Ptr = MachineLocation::VirtualFP; - MachineLocation SPDst(Ptr); - MachineLocation SPSrc(Ptr, StackOffset); - MMI.addFrameMove(Label, SPDst, SPSrc); + MMI.addFrameInst( + MCCFIInstruction::createDefCfaOffset(Label, StackOffset)); StackOffset += stackGrowth; } } @@ -956,10 +953,8 @@ void X86FrameLowering::emitPrologue(MachineFunction &MF) const { if (!HasFP && NumBytes) { // Define the current CFA rule to use the provided offset. assert(StackSize); - MachineLocation SPDst(MachineLocation::VirtualFP); - MachineLocation SPSrc(MachineLocation::VirtualFP, - -StackSize + stackGrowth); - MMI.addFrameMove(Label, SPDst, SPSrc); + MMI.addFrameInst(MCCFIInstruction::createDefCfaOffset( + Label, -StackSize + stackGrowth)); } // Emit DWARF info specifying the offsets of the callee-saved registers. -- cgit v1.2.3