From 75504d45ec5b1c3c19b3db9ab7efe29d3d1ac1e9 Mon Sep 17 00:00:00 2001
From: Chandler Carruth <chandlerc@gmail.com>
Date: Fri, 27 Jun 2014 18:25:23 +0000
Subject: [x86] Fix a miscompile in the new shuffle lowering uncovered by a
 bootstrap.

I managed to mis-remember how PACKUS worked on x86, and was using undef
for the high bytes instead of zero. The fix is fairly obvious.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211922 91177308-0d34-0410-b5e6-96231b3b80d8
---
 lib/Target/X86/X86ISelLowering.cpp         | 26 +++++++++---------
 test/CodeGen/X86/vector-shuffle-128-v16.ll | 42 ++++++++++++++++--------------
 2 files changed, 36 insertions(+), 32 deletions(-)

diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp
index c50f44daae..fa80717f99 100644
--- a/lib/Target/X86/X86ISelLowering.cpp
+++ b/lib/Target/X86/X86ISelLowering.cpp
@@ -7712,19 +7712,19 @@ static SDValue lowerV16I8VectorShuffle(SDValue Op, SDValue V1, SDValue V2,
 
     return DAG.getNode(X86ISD::UNPCKL, DL, MVT::v16i8, Evens, Odds);
   }
-
-  SDValue LoV1 = DAG.getNode(ISD::BITCAST, DL, MVT::v8i16,
-                             DAG.getNode(X86ISD::UNPCKL, DL, MVT::v16i8, V1,
-                                         DAG.getUNDEF(MVT::v8i16)));
-  SDValue HiV1 = DAG.getNode(ISD::BITCAST, DL, MVT::v8i16,
-                             DAG.getNode(X86ISD::UNPCKH, DL, MVT::v16i8, V1,
-                                         DAG.getUNDEF(MVT::v8i16)));
-  SDValue LoV2 = DAG.getNode(ISD::BITCAST, DL, MVT::v8i16,
-                             DAG.getNode(X86ISD::UNPCKL, DL, MVT::v16i8, V2,
-                                         DAG.getUNDEF(MVT::v8i16)));
-  SDValue HiV2 = DAG.getNode(ISD::BITCAST, DL, MVT::v8i16,
-                             DAG.getNode(X86ISD::UNPCKH, DL, MVT::v16i8, V2,
-                                         DAG.getUNDEF(MVT::v8i16)));
+  SDValue Zero = getZeroVector(MVT::v8i16, Subtarget, DAG, DL);
+  SDValue LoV1 =
+      DAG.getNode(ISD::BITCAST, DL, MVT::v8i16,
+                  DAG.getNode(X86ISD::UNPCKL, DL, MVT::v16i8, V1, Zero));
+  SDValue HiV1 =
+      DAG.getNode(ISD::BITCAST, DL, MVT::v8i16,
+                  DAG.getNode(X86ISD::UNPCKH, DL, MVT::v16i8, V1, Zero));
+  SDValue LoV2 =
+      DAG.getNode(ISD::BITCAST, DL, MVT::v8i16,
+                  DAG.getNode(X86ISD::UNPCKL, DL, MVT::v16i8, V2, Zero));
+  SDValue HiV2 =
+      DAG.getNode(ISD::BITCAST, DL, MVT::v8i16,
+                  DAG.getNode(X86ISD::UNPCKH, DL, MVT::v16i8, V2, Zero));
 
   int V1LoBlendMask[8] = {-1, -1, -1, -1, -1, -1, -1, -1};
   int V1HiBlendMask[8] = {-1, -1, -1, -1, -1, -1, -1, -1};
diff --git a/test/CodeGen/X86/vector-shuffle-128-v16.ll b/test/CodeGen/X86/vector-shuffle-128-v16.ll
index 6203aedcc1..b5e0b79088 100644
--- a/test/CodeGen/X86/vector-shuffle-128-v16.ll
+++ b/test/CodeGen/X86/vector-shuffle-128-v16.ll
@@ -23,7 +23,8 @@ define <16 x i8> @shuffle_v16i8_00_16_01_17_02_18_03_19_04_20_05_21_06_22_07_23(
 
 define <16 x i8> @shuffle_v16i8_16_00_16_01_16_02_16_03_16_04_16_05_16_06_16_07(<16 x i8> %a, <16 x i8> %b) {
 ; CHECK-SSE2-LABEL: @shuffle_v16i8_16_00_16_01_16_02_16_03_16_04_16_05_16_06_16_07
-; CHECK-SSE2:         punpcklbw %xmm0, %xmm1
+; CHECK-SSE2:         pxor %xmm2, %xmm2
+; CHECK-SSE2-NEXT:    punpcklbw %xmm2, %xmm1
 ; CHECK-SSE2-NEXT:    pshufd {{.*}} # xmm1 = xmm1[0,1,0,3]
 ; CHECK-SSE2-NEXT:    pshuflw {{.*}} # xmm1 = xmm1[0,0,0,0,4,5,6,7]
 ; CHECK-SSE2-NEXT:    pshufhw {{.*}} # xmm1 = xmm1[0,1,2,3,4,4,4,4]
@@ -37,14 +38,15 @@ define <16 x i8> @shuffle_v16i8_16_00_16_01_16_02_16_03_16_04_16_05_16_06_16_07(
 
 define <16 x i8> @shuffle_v16i8_03_02_01_00_07_06_05_04_11_10_09_08_15_14_13_12(<16 x i8> %a, <16 x i8> %b) {
 ; CHECK-SSE2-LABEL: @shuffle_v16i8_03_02_01_00_07_06_05_04_11_10_09_08_15_14_13_12
-; CHECK-SSE2:         movdqa %xmm0, %xmm1
-; CHECK-SSE2-NEXT:    punpckhbw %xmm0, %xmm1
-; CHECK-SSE2-NEXT:    pshuflw {{.*}} # xmm1 = xmm1[3,2,1,0,4,5,6,7]
-; CHECK-SSE2-NEXT:    pshufhw {{.*}} # xmm1 = xmm1[0,1,2,3,7,6,5,4]
-; CHECK-SSE2-NEXT:    punpcklbw %xmm0, %xmm0
+; CHECK-SSE2:         pxor %xmm1, %xmm1
+; CHECK-SSE2-NEXT:    movdqa %xmm0, %xmm2
+; CHECK-SSE2-NEXT:    punpckhbw %xmm1, %xmm2
+; CHECK-SSE2-NEXT:    pshuflw {{.*}} # xmm2 = xmm2[3,2,1,0,4,5,6,7]
+; CHECK-SSE2-NEXT:    pshufhw {{.*}} # xmm2 = xmm2[0,1,2,3,7,6,5,4]
+; CHECK-SSE2-NEXT:    punpcklbw %xmm1, %xmm0
 ; CHECK-SSE2-NEXT:    pshuflw {{.*}} # xmm0 = xmm0[3,2,1,0,4,5,6,7]
 ; CHECK-SSE2-NEXT:    pshufhw {{.*}} # xmm0 = xmm0[0,1,2,3,7,6,5,4]
-; CHECK-SSE2-NEXT:    packuswb %xmm1, %xmm0
+; CHECK-SSE2-NEXT:    packuswb %xmm2, %xmm0
 ; CHECK-SSE2-NEXT:    retq
   %shuffle = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 3, i32 2, i32 1, i32 0, i32 7, i32 6, i32 5, i32 4, i32 11, i32 10, i32 9, i32 8, i32 15, i32 14, i32 13, i32 12>
   ret <16 x i8> %shuffle
@@ -52,10 +54,11 @@ define <16 x i8> @shuffle_v16i8_03_02_01_00_07_06_05_04_11_10_09_08_15_14_13_12(
 
 define <16 x i8> @shuffle_v16i8_03_02_01_00_07_06_05_04_19_18_17_16_23_22_21_20(<16 x i8> %a, <16 x i8> %b) {
 ; CHECK-SSE2-LABEL: @shuffle_v16i8_03_02_01_00_07_06_05_04_19_18_17_16_23_22_21_20
-; CHECK-SSE2:         punpcklbw %xmm0, %xmm1
+; CHECK-SSE2:         pxor %xmm2, %xmm2
+; CHECK-SSE2-NEXT:    punpcklbw %xmm2, %xmm1
 ; CHECK-SSE2-NEXT:    pshuflw {{.*}} # xmm1 = xmm1[3,2,1,0,4,5,6,7]
 ; CHECK-SSE2-NEXT:    pshufhw {{.*}} # xmm1 = xmm1[0,1,2,3,7,6,5,4]
-; CHECK-SSE2-NEXT:    punpcklbw %xmm0, %xmm0
+; CHECK-SSE2-NEXT:    punpcklbw %xmm2, %xmm0
 ; CHECK-SSE2-NEXT:    pshuflw {{.*}} # xmm0 = xmm0[3,2,1,0,4,5,6,7]
 ; CHECK-SSE2-NEXT:    pshufhw {{.*}} # xmm0 = xmm0[0,1,2,3,7,6,5,4]
 ; CHECK-SSE2-NEXT:    packuswb %xmm1, %xmm0
@@ -66,19 +69,20 @@ define <16 x i8> @shuffle_v16i8_03_02_01_00_07_06_05_04_19_18_17_16_23_22_21_20(
 
 define <16 x i8> @shuffle_v16i8_03_02_01_00_31_30_29_28_11_10_09_08_23_22_21_20(<16 x i8> %a, <16 x i8> %b) {
 ; CHECK-SSE2-LABEL: @shuffle_v16i8_03_02_01_00_31_30_29_28_11_10_09_08_23_22_21_20
-; CHECK-SSE2:         movdqa %xmm1, %xmm2
-; CHECK-SSE2-NEXT:    punpcklbw %xmm0, %xmm2
-; CHECK-SSE2-NEXT:    pshufhw {{.*}} # xmm2 = xmm2[0,1,2,3,7,6,5,4]
-; CHECK-SSE2-NEXT:    movdqa %xmm0, %xmm3
-; CHECK-SSE2-NEXT:    punpckhbw %xmm0, %xmm3
-; CHECK-SSE2-NEXT:    pshuflw {{.*}} # xmm3 = xmm3[3,2,1,0,4,5,6,7]
-; CHECK-SSE2-NEXT:    shufpd {{.*}} # xmm3 = xmm3[0],xmm2[1]
-; CHECK-SSE2-NEXT:    punpckhbw %xmm0, %xmm1
+; CHECK-SSE2:         pxor %xmm2, %xmm2
+; CHECK-SSE2-NEXT:    movdqa %xmm1, %xmm3
+; CHECK-SSE2-NEXT:    punpcklbw %xmm2, %xmm3
+; CHECK-SSE2-NEXT:    pshufhw {{.*}} # xmm3 = xmm3[0,1,2,3,7,6,5,4]
+; CHECK-SSE2-NEXT:    movdqa %xmm0, %xmm4
+; CHECK-SSE2-NEXT:    punpckhbw %xmm2, %xmm4
+; CHECK-SSE2-NEXT:    pshuflw {{.*}} # xmm4 = xmm4[3,2,1,0,4,5,6,7]
+; CHECK-SSE2-NEXT:    shufpd {{.*}} # xmm4 = xmm4[0],xmm3[1]
+; CHECK-SSE2-NEXT:    punpckhbw %xmm2, %xmm1
 ; CHECK-SSE2-NEXT:    pshufhw {{.*}} # xmm1 = xmm1[0,1,2,3,7,6,5,4]
-; CHECK-SSE2-NEXT:    punpcklbw %xmm0, %xmm0
+; CHECK-SSE2-NEXT:    punpcklbw %xmm2, %xmm0
 ; CHECK-SSE2-NEXT:    pshuflw {{.*}} # xmm0 = xmm0[3,2,1,0,4,5,6,7]
 ; CHECK-SSE2-NEXT:    shufpd {{.*}} # xmm0 = xmm0[0],xmm1[1]
-; CHECK-SSE2-NEXT:    packuswb %xmm3, %xmm0
+; CHECK-SSE2-NEXT:    packuswb %xmm4, %xmm0
 ; CHECK-SSE2-NEXT:    retq
   %shuffle = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 3, i32 2, i32 1, i32 0, i32 31, i32 30, i32 29, i32 28, i32 11, i32 10, i32 9, i32 8, i32 23, i32 22, i32 21, i32 20>
   ret <16 x i8> %shuffle
-- 
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