From 935a1f08c105bfc7b19e2156e1246fc9a0db7db9 Mon Sep 17 00:00:00 2001
From: Pawel Wodnicki
Date: Tue, 4 Dec 2012 20:36:52 +0000
Subject: Merging r169280: into the 3.2 release branch.
Update release notes for NVPTX
git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_32@169297 91177308-0d34-0410-b5e6-96231b3b80d8
---
docs/ReleaseNotes.html | 25 ++++++++++++++++++++++++-
1 file changed, 24 insertions(+), 1 deletion(-)
diff --git a/docs/ReleaseNotes.html b/docs/ReleaseNotes.html
index 88fb12064b..48b8d71a87 100644
--- a/docs/ReleaseNotes.html
+++ b/docs/ReleaseNotes.html
@@ -433,6 +433,8 @@ Release Notes.
- ...
+ - New NVPTX back-end (replacing existing PTX back-end) based on NVIDIA
+ sources
@@ -685,6 +687,27 @@ Release Notes.
+
+
+
+
+
+
The PTX back-end has been replaced by the NVPTX back-end, which is based on
+ the LLVM back-end used by NVIDIA in their CUDA (nvcc) and OpenCL compiler.
+ Some highlights include:
+
+ - Compatibility with PTX 3.1 and SM 3.5
+ - Support for NVVM intrinsics as defined in the NVIDIA Compiler SDK
+ - Full compatibility with old PTX back-end, with much greater coverage of
+ LLVM IR
+
+
+
Please submit any back-end bugs to the LLVM Bugzilla site.
+
+
+
Known problem areas include:
- - The CellSPU, MSP430, PTX and XCore backends are experimental.
+ - The CellSPU, MSP430, and XCore backends are experimental.
- The integrated assembler, disassembler, and JIT is not supported by
several targets. If an integrated assembler is not supported, then a
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