From bd4bd3686d5e623514cc7564227a6fa45254c610 Mon Sep 17 00:00:00 2001 From: JF Bastien Date: Tue, 18 Jun 2013 23:07:16 +0000 Subject: Small correction to unordered memory code generation of ARM LDRD The information was correct pre-LPAE. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184253 91177308-0d34-0410-b5e6-96231b3b80d8 --- docs/Atomics.rst | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/docs/Atomics.rst b/docs/Atomics.rst index 705d73fbab..1243f34548 100644 --- a/docs/Atomics.rst +++ b/docs/Atomics.rst @@ -211,7 +211,7 @@ Notes for code generation never stored. A normal load or store instruction is usually sufficient, but note that an unordered load or store cannot be split into multiple instructions (or an instruction which does multiple memory operations, like - ``LDRD`` on ARM). + ``LDRD`` on ARM without LPAE, or not naturally-aligned ``LDRD`` on LPAE ARM). Monotonic --------- -- cgit v1.2.3