From 11f911f2534cd64776b48b5f4cac6b2b2da4d231 Mon Sep 17 00:00:00 2001 From: Evan Cheng Date: Mon, 5 Oct 2009 02:51:06 +0000 Subject: Move implicit and paralle to a separate codegen specific section. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83291 91177308-0d34-0410-b5e6-96231b3b80d8 --- docs/TableGenFundamentals.html | 26 +++++++++++++++++++------- 1 file changed, 19 insertions(+), 7 deletions(-) (limited to 'docs/TableGenFundamentals.html') diff --git a/docs/TableGenFundamentals.html b/docs/TableGenFundamentals.html index bf38dda79f..994484f250 100644 --- a/docs/TableGenFundamentals.html +++ b/docs/TableGenFundamentals.html @@ -398,13 +398,6 @@ which case the user must specify it explicitly.
a dag value. The first element is required to be a record definition, the remaining elements in the list may be arbitrary other values, including nested `dag' values.
-
(implicit a)
-
an implicitly defined physical register. This tells the dag instruction - selection emitter the input pattern's extra definitions matches implicit - physical register definitions.
-
(parallel (a), (b))
-
a list of dags specifying parallel operations which map to the same - instruction.
!strconcat(a, b)
A string value that is the result of concatenating the 'a' and 'b' strings.
@@ -759,6 +752,25 @@ opened, as in the case with the CALL* instructions above.

+ +
Code Generator backend info
+ + +

Expressions used by code generator to describe instructions and isel +patterns:

+ +
+ +
(implicit a)
+
an implicitly defined physical register. This tells the dag instruction + selection emitter the input pattern's extra definitions matches implicit + physical register definitions.
+
(parallel (a), (b))
+
a list of dags specifying parallel operations which map to the same + instruction.
+ +
+
TableGen backends
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