From 643eb5d7bab77e6fbf10778cfbe2cac2bf5c0aef Mon Sep 17 00:00:00 2001 From: Bill Wendling Date: Tue, 12 Feb 2008 07:06:19 +0000 Subject: Reformatting. Adding "doc_code" divisions for code examples. Updated some of the examples to reflect the current .TD files. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46995 91177308-0d34-0410-b5e6-96231b3b80d8 --- docs/TableGenFundamentals.html | 350 +++++++++++++++++++++++++++-------------- 1 file changed, 231 insertions(+), 119 deletions(-) (limited to 'docs/TableGenFundamentals.html') diff --git a/docs/TableGenFundamentals.html b/docs/TableGenFundamentals.html index 90836e91bd..ee1d5b1fe0 100644 --- a/docs/TableGenFundamentals.html +++ b/docs/TableGenFundamentals.html @@ -68,8 +68,8 @@ href="#backends">TableGen backend" for processing. The current major user of TableGen is the LLVM code generator.

Note that if you work on TableGen much, and use emacs or vim, that you can -find an emacs "TableGen mode" and a vim language file in -llvm/utils/emacs and llvm/utils/vim directory of your LLVM +find an emacs "TableGen mode" and a vim language file in the +llvm/utils/emacs and llvm/utils/vim directories of your LLVM distribution, respectively.

@@ -83,11 +83,11 @@ distribution, respectively.

of which are considered 'records'.

TableGen records have a unique name, a list of values, and a list of -superclasses. The list of values is main data that TableGen builds for each -record, it is this that holds the domain specific information for the +superclasses. The list of values is the main data that TableGen builds for each +record; it is this that holds the domain specific information for the application. The interpretation of this data is left to a specific TableGen backend, but the structure and format rules are -taken care of and fixed by TableGen.

+taken care of and are fixed by TableGen.

TableGen definitions are the concrete form of 'records'. These generally do not have any undefined values, and are marked with the @@ -95,7 +95,7 @@ generally do not have any undefined values, and are marked with the

TableGen classes are abstract records that are used to build and describe other records. These 'classes' allow the end-user to build -abstractions for either the domain they are targetting (such as "Register", +abstractions for either the domain they are targeting (such as "Register", "RegisterClass", and "Instruction" in the LLVM code generator) or for the implementor to help factor out common properties of records (such as "FPInst", which is used to represent floating point instructions in the X86 backend). @@ -119,42 +119,71 @@ all of the classes, then all of the definitions. This is a good way to see what the various definitions expand to fully. Running this on the X86.td file prints this (at the time of this writing):

+
 ...
-def ADDrr8 {    // Instruction X86Inst I2A8 Pattern
-  string Name = "add";
+def ADD32rr {   // Instruction X86Inst I
   string Namespace = "X86";
+  dag OutOperandList = (outs GR32:$dst);
+  dag InOperandList = (ins GR32:$src1, GR32:$src2);
+  string AsmString = "add{l}\t{$src2, $dst|$dst, $src2}";
+  list<dag> Pattern = [(set GR32:$dst, (add GR32:$src1, GR32:$src2))];
   list<Register> Uses = [];
-  list<Register> Defs = [];
+  list<Register> Defs = [EFLAGS];
+  list<Predicate> Predicates = [];
+  int CodeSize = 3;
+  int AddedComplexity = 0;
   bit isReturn = 0;
   bit isBranch = 0;
+  bit isIndirectBranch = 0;
+  bit isBarrier = 0;
   bit isCall = 0;
+  bit isSimpleLoad = 0;
+  bit mayLoad = 0;
+  bit mayStore = 0;
+  bit isImplicitDef = 0;
   bit isTwoAddress = 1;
+  bit isConvertibleToThreeAddress = 1;
+  bit isCommutable = 1;
   bit isTerminator = 0;
-  dag Pattern = (set R8, (plus R8, R8));
-  bits<8> Opcode = { 0, 0, 0, 0, 0, 0, 0, 0 };
+  bit isReMaterializable = 0;
+  bit isPredicable = 0;
+  bit hasDelaySlot = 0;
+  bit usesCustomDAGSchedInserter = 0;
+  bit hasCtrlDep = 0;
+  bit isNotDuplicable = 0;
+  bit hasSideEffects = 0;
+  bit mayHaveSideEffects = 0;
+  bit neverHasSideEffects = 0;
+  InstrItinClass Itinerary = NoItinerary;
+  string Constraints = "";
+  string DisableEncoding = "";
+  bits<8> Opcode = { 0, 0, 0, 0, 0, 0, 0, 1 };
   Format Form = MRMDestReg;
-  bits<5> FormBits = { 0, 0, 0, 1, 1 };
-  ArgType Type = Arg8;
-  bits<3> TypeBits = { 0, 0, 1 };
+  bits<6> FormBits = { 0, 0, 0, 0, 1, 1 };
+  ImmType ImmT = NoImm;
+  bits<3> ImmTypeBits = { 0, 0, 0 };
   bit hasOpSizePrefix = 0;
-  bit printImplicitUses = 0;
+  bit hasAdSizePrefix = 0;
   bits<4> Prefix = { 0, 0, 0, 0 };
+  bit hasREX_WPrefix = 0;
   FPFormat FPForm = ?;
   bits<3> FPFormBits = { 0, 0, 0 };
 }
 ...
+
-

This definition corresponds to an 8-bit register-register add instruction in +

This definition corresponds to a 32-bit register-register add instruction in the X86. The string after the 'def' string indicates the name of the -record ("ADDrr8" in this case), and the comment at the end of the line -indicates the superclasses of the definition. The body of the record contains -all of the data that TableGen assembled for the record, indicating that the -instruction is part of the "X86" namespace, should be printed as "add" -in the assembly file, it is a two-address instruction, has a particular -encoding, etc. The contents and semantics of the information in the record is -specific to the needs of the X86 backend, and is only shown as an example.

+record—"ADD32rr" in this case—and the comment at the end of +the line indicates the superclasses of the definition. The body of the record +contains all of the data that TableGen assembled for the record, indicating that +the instruction is part of the "X86" namespace, the pattern indicating how the +the instruction should be emitted into the assembly file, that it is a +two-address instruction, has a particular encoding, etc. The contents and +semantics of the information in the record is specific to the needs of the X86 +backend, and is only shown as an example.

As you can see, a lot of information is needed for every instruction supported by the code generator, and specifying it all manually would be @@ -162,16 +191,23 @@ unmaintainble, prone to bugs, and tiring to do in the first place. Because we are using TableGen, all of the information was derived from the following definition:

+
-def ADDrr8   : I2A8<"add", 0x00, MRMDestReg>,
-               Pattern<(set R8, (plus R8, R8))>;
+let Defs = [EFLAGS],
+    isCommutable = 1,                  // X = ADD Y,Z --> X = ADD Z,Y
+    isConvertibleToThreeAddress = 1 in // Can transform into LEA.
+def ADD32rr  : I<0x01, MRMDestReg, (outs GR32:$dst),
+                                   (ins GR32:$src1, GR32:$src2),
+                 "add{l}\t{$src2, $dst|$dst, $src2}",
+                 [(set GR32:$dst, (add GR32:$src1, GR32:$src2))]>;
+
-

This definition makes use of the custom I2A8 (two address instruction with -8-bit operand) class, which is defined in the X86-specific TableGen file to -factor out the common features that instructions of its class share. A key -feature of TableGen is that it allows the end-user to define the abstractions -they prefer to use when describing their information.

+

This definition makes use of the custom class I (extended from the +custom class X86Inst), which is defined in the X86-specific TableGen +file, to factor out the common features that instructions of its class share. A +key feature of TableGen is that it allows the end-user to define the +abstractions they prefer to use when describing their information.

@@ -186,28 +222,37 @@ reads from standard input.

To be useful, one of the TableGen backends must be used. These backends are selectable on the command line (type 'tblgen ---help' for a list). For example, to get a list of all of the definitions +-help' for a list). For example, to get a list of all of the definitions that subclass a particular type (which can be useful for building up an enum -list of these records), use the --print-enums option:

+list of these records), use the -print-enums option:

+
 $ tblgen X86.td -print-enums -class=Register
-AH, AL, AX, BH, BL, BP, BX, CH, CL, CX, DH, DI, DL, DX,
-EAX, EBP, EBX, ECX, EDI, EDX, ESI, ESP, FP0, FP1, FP2, FP3, FP4, FP5, FP6,
-SI, SP, ST0, ST1, ST2, ST3, ST4, ST5, ST6, ST7, 
+AH, AL, AX, BH, BL, BP, BPL, BX, CH, CL, CX, DH, DI, DIL, DL, DX, EAX, EBP, EBX,
+ECX, EDI, EDX, EFLAGS, EIP, ESI, ESP, FP0, FP1, FP2, FP3, FP4, FP5, FP6, IP,
+MM0, MM1, MM2, MM3, MM4, MM5, MM6, MM7, R10, R10B, R10D, R10W, R11, R11B, R11D,
+R11W, R12, R12B, R12D, R12W, R13, R13B, R13D, R13W, R14, R14B, R14D, R14W, R15,
+R15B, R15D, R15W, R8, R8B, R8D, R8W, R9, R9B, R9D, R9W, RAX, RBP, RBX, RCX, RDI,
+RDX, RIP, RSI, RSP, SI, SIL, SP, SPL, ST0, ST1, ST2, ST3, ST4, ST5, ST6, ST7,
+XMM0, XMM1, XMM10, XMM11, XMM12, XMM13, XMM14, XMM15, XMM2, XMM3, XMM4, XMM5,
+XMM6, XMM7, XMM8, XMM9,
 
 $ tblgen X86.td -print-enums -class=Instruction 
-ADCrr32, ADDri16, ADDri16b, ADDri32, ADDri32b, ADDri8, ADDrr16, ADDrr32,
-ADDrr8, ADJCALLSTACKDOWN, ADJCALLSTACKUP, ANDri16, ANDri16b, ANDri32, ANDri32b,
-ANDri8, ANDrr16, ANDrr32, ANDrr8, BSWAPr32, CALLm32, CALLpcrel32, ...
+ABS_F, ABS_Fp32, ABS_Fp64, ABS_Fp80, ADC32mi, ADC32mi8, ADC32mr, ADC32ri,
+ADC32ri8, ADC32rm, ADC32rr, ADC64mi32, ADC64mi8, ADC64mr, ADC64ri32, ADC64ri8,
+ADC64rm, ADC64rr, ADD16mi, ADD16mi8, ADD16mr, ADD16ri, ADD16ri8, ADD16rm,
+ADD16rr, ADD32mi, ADD32mi8, ADD32mr, ADD32ri, ADD32ri8, ADD32rm, ADD32rr,
+ADD64mi32, ADD64mi8, ADD64mr, ADD64ri32, ...
+

The default backend prints out all of the records, as described above.

-

If you plan to use TableGen for some purpose, you will most likely have to -write a backend that extracts the information specific -to what you need and formats it in the appropriate way.

+

If you plan to use TableGen, you will most likely have to write a backend that extracts the information specific to +what you need and formats it in the appropriate way.

@@ -217,10 +262,12 @@ to what you need and formats it in the appropriate way.

-

TableGen doesn't care about the meaning of data (that is up to the backend -to define), but it does care about syntax, and it enforces a simple type system. + +

TableGen doesn't care about the meaning of data (that is up to the backend to +define), but it does care about syntax, and it enforces a simple type system. This section describes the syntax and the constructs allowed in a TableGen file.

+
@@ -230,8 +277,10 @@ This section describes the syntax and the constructs allowed in a TableGen file.
TableGen comments
+

TableGen supports BCPL style "//" comments, which run to the end of the line, and it also supports nestable "/* */" comments.

+
@@ -240,6 +289,7 @@ the line, and it also supports nestable "/* */" comments.

+

TableGen files are strongly typed, in a simple (but complete) type-system. These types are used to perform automatic conversions, check for errors, and to help interface designers constrain the input that they allow. Every

To date, these types have been sufficient for describing things that @@ -301,34 +358,54 @@ natural syntax and flavor for the application. The current expression forms supported include:

    -
  • ? - uninitialized field
    • -
  • 0b1001011 - binary integer value
    • -
  • 07654321 - octal integer value (indicated by a leading 0)
    • -
  • 7 - decimal integer value
    • -
  • 0x7F - hexadecimal integer value
    • -
  • "foo" - string value
    • -
  • [{ ... }] - code fragment
    • -
  • [ X, Y, Z ] - list value.
    • -
  • { a, b, c } - initializer for a "bits<3>" value
    • -
  • value - value reference
    • -
  • value{17} - access to one bit of a value
    • -
  • value{15-17} - access to multiple bits of a value
    • -
  • DEF - reference to a record definition
    • -
  • CLASS<val list> - reference to a new anonymous definition of - CLASS with the specified template arguments.
    • -
  • X.Y - reference to the subfield of a value
    • -
  • list[4-7,17,2-3] - A slice of the 'list' list, including elements -4,5,6,7,17,2, and 3 from it. Elements may be included multiple times.
    • -
  • (DEF a, b) - a dag value. The first element is required to be a -record definition, the remaining elements in the list may be arbitrary other -values, including nested `dag' values.
    • -
  • !strconcat(a, b) - A string value that is the result of - concatenating the 'a' and 'b' strings.
    • +
    +? +
    uninitialized field
    +0b1001011 +
    binary integer value
    +07654321 +
    octal integer value (indicated by a leading 0)
    +7 +
    decimal integer value
    +0x7F +
    hexadecimal integer value
    +"foo" +
    string value
    +[{ ... }] +
    code fragment
    +[ X, Y, Z ] +
    list value.
    +{ a, b, c } +
    initializer for a "bits<3>" value
    +value +
    value reference
    +value{17} +
    access to one bit of a value
    +value{15-17} +
    access to multiple bits of a value
    +DEF +
    reference to a record definition
    +CLASS<val list> +
    reference to a new anonymous definition of CLASS with the specified + template arguments.
    +X.Y +
    reference to the subfield of a value
    +list[4-7,17,2-3] +
    A slice of the 'list' list, including elements 4,5,6,7,17,2, and 3 from + it. Elements may be included multiple times.
    +(DEF a, b) +
    a dag value. The first element is required to be a record definition, the + remaining elements in the list may be arbitrary other values, including nested + `dag' values.
    +!strconcat(a, b) +
    A string value that is the result of concatenating the 'a' and 'b' + strings.
    +

Note that all of the values have rules specifying how they convert to values -for different types. These rules allow you to assign a value like "7" to a -"bits<4>" value, for example.

+for different types. These rules allow you to assign a value like "7" +to a "bits<4>" value, for example.

@@ -345,11 +422,14 @@ information that TableGen collects. Records are defined with a def or class keyword, the record name, and an optional list of "template arguments". If the record has superclasses, they are specified as a comma separated list that starts with a colon character -(":"). If value definitions or let -expressions are needed for the class, they are enclosed in curly braces -("{}"); otherwise, the record ends with a semicolon. Here is a simple TableGen -file:

+(":"). If value definitions or let expressions are needed for the class, they are +enclosed in curly braces ("{}"); otherwise, the record ends with a +semicolon.

+

Here is a simple TableGen file:

+ +
 class C { bit V = 1; }
 def X : C;
@@ -357,6 +437,7 @@ file:

   string Greeting = "hello";
 }
+

This example defines two definitions, X and Y, both of which derive from the C class. Because of this, they both get the @@ -376,12 +457,14 @@ subclasses to override them as they wish.

+

Value definitions define named entries in records. A value must be defined before it can be referred to as the operand for another value definition or before the value is reset with a let expression. A value is defined by specifying a TableGen type and a name. If an initial value is available, it may be specified after the type with an equal sign. Value definitions require terminating semicolons.

+
@@ -390,17 +473,20 @@ equal sign. Value definitions require terminating semicolons.

+

A record-level let expression is used to change the value of a value definition in a record. This is primarily useful when a superclass defines a value that a derived class or definition wants to override. Let expressions consist of the 'let' keyword followed by a value name, an equal sign -("="), and a new value. For example, a new class could be added to the example -above, redefining the V field for all of its subclasses:

+("="), and a new value. For example, a new class could be added to the +example above, redefining the V field for all of its subclasses:

+
 class D : C { let V = 0; }
 def Z : D;
+

In this case, the Z definition will have a zero value for its "V" value, despite the fact that it derives (indirectly) from the C class, @@ -414,11 +500,13 @@ because the D class overrode its value.

+

TableGen permits the definition of parameterized classes as well as normal concrete classes. Parameterized TableGen classes specify a list of variable bindings (which may optionally have defaults) that are bound when used. Here is a simple example:

+
 class FPFormat<bits<3> val> {
   bits<3> Value = val;
@@ -428,16 +516,20 @@ a simple example:

 def OneArgFP   : FPFormat<2>;
 def OneArgFPRW : FPFormat<3>;
 def TwoArgFP   : FPFormat<4>;
-def SpecialFP  : FPFormat<5>;
+def CompareFP  : FPFormat<5>;
+def CondMovFP  : FPFormat<6>;
+def SpecialFP  : FPFormat<7>;
+

In this case, template arguments are used as a space efficient way to specify -a list of "enumeration values", each with a "Value" field set to the specified -integer.

+a list of "enumeration values", each with a "Value" field set to the +specified integer.

The more esoteric forms of TableGen expressions are useful in conjunction with template arguments. As an example:

+
 class ModRefVal<bits<2> val> {
   bits<2> Value = val;
@@ -449,7 +541,7 @@ useful in conjunction with template arguments.  As an example:

 def ModRef : ModRefVal<3>;
 
 class Value<ModRefVal MR> {
-  // decode some information into a more convenient format, while providing
+  // Decode some information into a more convenient format, while providing
   // a nice interface to the user of the "Value" class.
   bit isMod = MR.Value{0};
   bit isRef = MR.Value{1};
@@ -462,12 +554,14 @@ useful in conjunction with template arguments.  As an example:

 def zork : Value<Ref>;
 def hork : Value<ModRef>;
+

This is obviously a contrived example, but it shows how template arguments can be used to decouple the interface provided to the user of the class from the actual internal data representation expected by the class. In this case, running tblgen on the example prints the following definitions:

+
 def bork {      // Value
   bit isMod = 1;
@@ -482,6 +576,7 @@ running tblgen on the example prints the following definitions:

   bit isRef = 1;
 }
+

This shows that TableGen was able to dig into the argument and extract a piece of information that was requested by the designer of the "Value" class. @@ -502,15 +597,16 @@ While classes with template arguments are a good way to factor commonality between two instances of a definition, multiclasses allow a convenient notation for defining multiple definitions at once (instances of implicitly constructed classes). For example, consider an 3-address instruction set whose instructions -come in two forms: "reg = reg op reg" and "reg = reg op imm" (e.g. SPARC). In -this case, you'd like to specify in one place that this commonality exists, then -in a separate place indicate what all the ops are. +come in two forms: "reg = reg op reg" and "reg = reg op imm" +(e.g. SPARC). In this case, you'd like to specify in one place that this +commonality exists, then in a separate place indicate what all the ops are.

Here is an example TableGen fragment that shows this idea:

+
 def ops;
 def GPR;
@@ -524,18 +620,20 @@ Here is an example TableGen fragment that shows this idea:
                  (ops GPR:$dst, GPR:$src1, Imm:$src2)>;
 }
 
-// Instantiations of the ri_inst multiclass.
+// Instantiations of the ri_inst multiclass.
 defm ADD : ri_inst<0b111, "add">;
 defm SUB : ri_inst<0b101, "sub">;
 defm MUL : ri_inst<0b100, "mul">;
 ...
+

The name of the resultant definitions has the multidef fragment names - appended to them, so this defines ADD_rr, ADD_ri, SUB_rr, etc. Using a - multiclass this way is exactly equivalent to instantiating the - classes multiple times yourself, e.g. by writing:

- + appended to them, so this defines ADD_rr, ADD_ri, + SUB_rr, etc. Using a multiclass this way is exactly equivalent to + instantiating the classes multiple times yourself, e.g. by writing:

+ +
 def ops;
 def GPR;
@@ -550,7 +648,7 @@ Here is an example TableGen fragment that shows this idea:
   : inst<opc, !strconcat(asmstr, " $dst, $src1, $src2"),
          (ops GPR:$dst, GPR:$src1, Imm:$src2)>;
 
-// Instantiations of the ri_inst multiclass.
+// Instantiations of the ri_inst multiclass.
 def ADD_rr : rrinst<0b111, "add">;
 def ADD_ri : riinst<0b111, "add">;
 def SUB_rr : rrinst<0b101, "sub">;
@@ -559,6 +657,7 @@ Here is an example TableGen fragment that shows this idea:
 def MUL_ri : riinst<0b100, "mul">;
 ...
+
@@ -578,9 +677,11 @@ the specified file in place of the include directive. The filename should be specified as a double quoted string immediately after the 'include' keyword. Example:

+
 include "foo.td"
+
@@ -590,7 +691,8 @@ keyword. Example:

-

"let" expressions at file scope are similar to "let" + +

"Let" expressions at file scope are similar to "let" expressions within a record, except they can specify a value binding for multiple records at a time, and may be useful in certain other cases. File-scope let expressions are really just another way that TableGen allows the @@ -600,22 +702,30 @@ end-user to factor out commonality from the records.

apply, and one of more records to bind the values in. Here are some examples:

+
-let isTerminator = 1, isReturn = 1 in
-  def RET : X86Inst<"ret", 0xC3, RawFrm, NoArg>;
+let isTerminator = 1, isReturn = 1, isBarrier = 1, hasCtrlDep = 1 in
+  def RET : I<0xC3, RawFrm, (outs), (ins), "ret", [(X86retflag 0)]>;
 
 let isCall = 1 in
   // All calls clobber the non-callee saved registers...
-  let Defs = [EAX, ECX, EDX, FP0, FP1, FP2, FP3, FP4, FP5, FP6] in {
-    def CALLpcrel32 : X86Inst<"call", 0xE8, RawFrm, NoArg>;
-    def CALLr32     : X86Inst<"call", 0xFF, MRMS2r, Arg32>;
-    def CALLm32     : X86Inst<"call", 0xFF, MRMS2m, Arg32>;
+  let Defs = [EAX, ECX, EDX, FP0, FP1, FP2, FP3, FP4, FP5, FP6, ST0,
+              MM0, MM1, MM2, MM3, MM4, MM5, MM6, MM7,
+              XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, XMM7, EFLAGS] in {
+    def CALLpcrel32 : Ii32<0xE8, RawFrm, (outs), (ins i32imm:$dst,variable_ops),
+                           "call\t${dst:call}", []>;
+    def CALL32r     : I<0xFF, MRM2r, (outs), (ins GR32:$dst, variable_ops),
+                        "call\t{*}$dst", [(X86call GR32:$dst)]>;
+    def CALL32m     : I<0xFF, MRM2m, (outs), (ins i32mem:$dst, variable_ops),
+                        "call\t{*}$dst", []>;
   }
+

File-scope "let" expressions are often useful when a couple of definitions need to be added to several records, and the records do not otherwise need to be -opened, as in the case with the CALL* instructions above.

+opened, as in the case with the CALL* instructions above.

+
@@ -623,9 +733,11 @@ opened, as in the case with the CALL* instructions above.

-

How they work, how to write one. This section should not contain details -about any particular backend, except maybe -print-enums as an example. This -should highlight the APIs in TableGen/Record.h.

+ +

TODO: How they work, how to write one. This section should not contain +details about any particular backend, except maybe -print-enums as an example. +This should highlight the APIs in TableGen/Record.h.

+
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