From 727273b11c315b0ba5ef9cbf4df442ce627045ef Mon Sep 17 00:00:00 2001 From: Alp Toker Date: Thu, 15 May 2014 01:52:21 +0000 Subject: Fix typos git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208839 91177308-0d34-0410-b5e6-96231b3b80d8 --- docs/BigEndianNEON.rst | 2 +- docs/BlockFrequencyTerminology.rst | 2 +- docs/Extensions.rst | 2 +- 3 files changed, 3 insertions(+), 3 deletions(-) (limited to 'docs') diff --git a/docs/BigEndianNEON.rst b/docs/BigEndianNEON.rst index 4dc1628a0e..242eb0e73d 100644 --- a/docs/BigEndianNEON.rst +++ b/docs/BigEndianNEON.rst @@ -58,7 +58,7 @@ A "little endian" layout has the least significant byte first (lowest in memory Big endian vector load using ``LDR``. -A vector is a consecutive sequence of items that are operated on simultaneously. To load a 64-bit vector, 64 bits need to be read from memory. In little endian mode, we can do this by just performing a 64-bit load - ``LDR q0, [foo]``. However if we try this in big endian mode, because of the byte swapping the lane indices end up being swapped! The zero'th item as layed out in memory becomes the n'th lane in the vector. +A vector is a consecutive sequence of items that are operated on simultaneously. To load a 64-bit vector, 64 bits need to be read from memory. In little endian mode, we can do this by just performing a 64-bit load - ``LDR q0, [foo]``. However if we try this in big endian mode, because of the byte swapping the lane indices end up being swapped! The zero'th item as laid out in memory becomes the n'th lane in the vector. .. figure:: ARM-BE-ld1.png :align: right diff --git a/docs/BlockFrequencyTerminology.rst b/docs/BlockFrequencyTerminology.rst index 512dee18f1..41f89f8ce9 100644 --- a/docs/BlockFrequencyTerminology.rst +++ b/docs/BlockFrequencyTerminology.rst @@ -97,7 +97,7 @@ Implementation: Getting from mass and scale to frequency ======================================================== After analysing the complete series of DAGs, each block has a mass (local to -its containing loop, if any), and each loop psuedo-node has a loop scale and +its containing loop, if any), and each loop pseudo-node has a loop scale and its own mass (from its parent's DAG). We can get an initial frequency assignment (with entry frequency of 1.0) by diff --git a/docs/Extensions.rst b/docs/Extensions.rst index 9dddab5b5e..a49485cc5e 100644 --- a/docs/Extensions.rst +++ b/docs/Extensions.rst @@ -178,7 +178,7 @@ in the following fashion: bl __chkstk sub.w sp, sp, r4 -However, this has the limitation of 32 MiB (±16MiB). In order to accomodate +However, this has the limitation of 32 MiB (±16MiB). In order to accommodate larger binaries, LLVM supports the use of ``-mcode-model=large`` to allow a 4GiB range via a slight deviation. It will generate an indirect jump as follows: -- cgit v1.2.3