From 1386e9b7b16a8138ae7060c2dbb8b029f7c4fce2 Mon Sep 17 00:00:00 2001 From: Benjamin Kramer Date: Tue, 29 May 2012 19:05:25 +0000 Subject: Add intrinsics, code gen, assembler and disassembler support for the SSE4a extrq and insertq instructions. This required light surgery on the assembler and disassembler because the instructions use an uncommon encoding. They are the only two instructions in x86 that use register operands and two immediates. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157634 91177308-0d34-0410-b5e6-96231b3b80d8 --- include/llvm/IntrinsicsX86.td | 11 +++++++++++ 1 file changed, 11 insertions(+) (limited to 'include/llvm/IntrinsicsX86.td') diff --git a/include/llvm/IntrinsicsX86.td b/include/llvm/IntrinsicsX86.td index 805d3667d1..afba3a0667 100644 --- a/include/llvm/IntrinsicsX86.td +++ b/include/llvm/IntrinsicsX86.td @@ -1008,6 +1008,17 @@ let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.". // SSE4A let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.". + def int_x86_sse4a_extrqi : GCCBuiltin<"__builtin_ia32_extrqi">, + Intrinsic<[llvm_v2i64_ty], [llvm_v2i64_ty, llvm_i8_ty, llvm_i8_ty], []>; + def int_x86_sse4a_extrq : GCCBuiltin<"__builtin_ia32_extrq">, + Intrinsic<[llvm_v2i64_ty], [llvm_v2i64_ty, llvm_v16i8_ty], []>; + + def int_x86_sse4a_insertqi : GCCBuiltin<"__builtin_ia32_insertqi">, + Intrinsic<[llvm_v2i64_ty], [llvm_v2i64_ty, llvm_v2i64_ty, + llvm_i8_ty, llvm_i8_ty], []>; + def int_x86_sse4a_insertq : GCCBuiltin<"__builtin_ia32_insertq">, + Intrinsic<[llvm_v2i64_ty], [llvm_v2i64_ty, llvm_v2i64_ty], []>; + def int_x86_sse4a_movnt_ss : GCCBuiltin<"__builtin_ia32_movntss">, Intrinsic<[], [llvm_ptr_ty, llvm_v4f32_ty], []>; def int_x86_sse4a_movnt_sd : GCCBuiltin<"__builtin_ia32_movntsd">, -- cgit v1.2.3