From abd7ca070636a7132344165db834f1d006554e4a Mon Sep 17 00:00:00 2001 From: Michael Zolotukhin Date: Sat, 26 Apr 2014 09:56:41 +0000 Subject: Revert r206749 till a final decision about the intrinsics is made. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207313 91177308-0d34-0410-b5e6-96231b3b80d8 --- include/llvm/Target/TargetLowering.h | 16 ---------------- 1 file changed, 16 deletions(-) (limited to 'include/llvm/Target/TargetLowering.h') diff --git a/include/llvm/Target/TargetLowering.h b/include/llvm/Target/TargetLowering.h index c17416dfee..8dba94fc27 100644 --- a/include/llvm/Target/TargetLowering.h +++ b/include/llvm/Target/TargetLowering.h @@ -221,10 +221,6 @@ public: /// Return true if pow2 div is cheaper than a chain of srl/add/sra. bool isPow2DivCheap() const { return Pow2DivIsCheap; } - /// Return true if Div never traps, returns 0 when div by 0 and return TMin, - /// when sdiv TMin by -1. - bool isDivWellDefined() const { return DivIsWellDefined; } - /// Return true if Flow Control is an expensive operation that should be /// avoided. bool isJumpExpensive() const { return JumpIsExpensive; } @@ -1041,13 +1037,6 @@ protected: /// signed divide by power of two, and let the target handle it. void setPow2DivIsCheap(bool isCheap = true) { Pow2DivIsCheap = isCheap; } - /// Tells the code-generator that it is safe to execute sdiv/udiv/srem/urem - /// even when RHS is 0. It is also safe to execute sdiv/srem when LHS is - /// SignedMinValue and RHS is -1. - void setDivIsWellDefined (bool isWellDefined = true) { - DivIsWellDefined = isWellDefined; - } - /// Add the specified register class as an available regclass for the /// specified value type. This indicates the selector can handle values of /// that class natively. @@ -1469,11 +1458,6 @@ private: /// signed divide by power of two, and let the target handle it. bool Pow2DivIsCheap; - /// Tells the code-generator that it is safe to execute sdiv/udiv/srem/urem - /// even when RHS is 0. It is also safe to execute sdiv/srem when LHS is - /// SignedMinValue and RHS is -1. - bool DivIsWellDefined; - /// Tells the code generator that it shouldn't generate extra flow control /// instructions and should attempt to combine flow control instructions via /// predication. -- cgit v1.2.3