From 346018bbe7301f73b4c77a0aa89a4a938ab6af26 Mon Sep 17 00:00:00 2001 From: Nick Lewycky Date: Mon, 28 Feb 2011 06:52:12 +0000 Subject: Teach ValueTracking to look at the dividend when determining the sign bit of an srem instruction. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126637 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Analysis/ValueTracking.cpp | 12 ++++++++++++ 1 file changed, 12 insertions(+) (limited to 'lib/Analysis') diff --git a/lib/Analysis/ValueTracking.cpp b/lib/Analysis/ValueTracking.cpp index 1060bc5349..fac0407da5 100644 --- a/lib/Analysis/ValueTracking.cpp +++ b/lib/Analysis/ValueTracking.cpp @@ -460,6 +460,18 @@ void llvm::ComputeMaskedBits(Value *V, const APInt &Mask, assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); } } + if (Mask.isNegative()) { // We're looking for the sign bit. + APInt Mask2 = APInt::getSignBit(BitWidth); + KnownZero2 = 0; + KnownOne2 = 0; + ComputeMaskedBits(I->getOperand(0), Mask2, KnownZero2, KnownOne2, TD, + Depth+1); + if (KnownOne2[BitWidth-1]) + KnownOne |= Mask2; + if (KnownZero2[BitWidth-1]) + KnownZero |= Mask2; + assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?"); + } break; case Instruction::URem: { if (ConstantInt *Rem = dyn_cast(I->getOperand(1))) { -- cgit v1.2.3