From 9a2d23974068914097a0ad65188ab7c644006760 Mon Sep 17 00:00:00 2001 From: Jiangning Liu Date: Tue, 3 Jun 2014 03:25:09 +0000 Subject: [AArch64] Correctly deal with VPR stack parameter passing. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210067 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/AArch64/AArch64ISelLowering.cpp | 13 ++++++++++--- 1 file changed, 10 insertions(+), 3 deletions(-) (limited to 'lib/Target/AArch64') diff --git a/lib/Target/AArch64/AArch64ISelLowering.cpp b/lib/Target/AArch64/AArch64ISelLowering.cpp index 7bb07ccef3..4bc22c338e 100644 --- a/lib/Target/AArch64/AArch64ISelLowering.cpp +++ b/lib/Target/AArch64/AArch64ISelLowering.cpp @@ -1711,7 +1711,9 @@ SDValue AArch64TargetLowering::LowerFormalArguments( InVals.push_back(FrameIdxN); continue; - } if (VA.isRegLoc()) { + } + + if (VA.isRegLoc()) { // Arguments stored in registers. EVT RegVT = VA.getLocVT(); @@ -1772,25 +1774,30 @@ SDValue AArch64TargetLowering::LowerFormalArguments( SDValue FIN = DAG.getFrameIndex(FI, getPointerTy()); SDValue ArgValue; + // For NON_EXTLOAD, generic code in getLoad assert(ValVT == MemVT) ISD::LoadExtType ExtType = ISD::NON_EXTLOAD; + MVT MemVT = VA.getValVT(); + switch (VA.getLocInfo()) { default: break; case CCValAssign::SExt: ExtType = ISD::SEXTLOAD; + MemVT = VA.getLocVT(); break; case CCValAssign::ZExt: ExtType = ISD::ZEXTLOAD; + MemVT = VA.getLocVT(); break; case CCValAssign::AExt: ExtType = ISD::EXTLOAD; + MemVT = VA.getLocVT(); break; } ArgValue = DAG.getExtLoad(ExtType, DL, VA.getValVT(), Chain, FIN, MachinePointerInfo::getFixedStack(FI), - VA.getLocVT(), - false, false, false, 0); + MemVT, false, false, false, 0); InVals.push_back(ArgValue); } -- cgit v1.2.3