From f61a467a5904a380ec9af743f2739ef68955ffb2 Mon Sep 17 00:00:00 2001 From: Tim Northover Date: Thu, 15 May 2014 11:16:32 +0000 Subject: TableGen/ARM64: print aliases even if they have syntax variants. To get at least one use of the change (and some actual tests) in with its commit, I've enabled the AArch64 & ARM64 NEON mov aliases. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208867 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/AArch64/AArch64InstrNEON.td | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) (limited to 'lib/Target/AArch64') diff --git a/lib/Target/AArch64/AArch64InstrNEON.td b/lib/Target/AArch64/AArch64InstrNEON.td index 0b97e3bdf5..01a59a1a6a 100644 --- a/lib/Target/AArch64/AArch64InstrNEON.td +++ b/lib/Target/AArch64/AArch64InstrNEON.td @@ -446,12 +446,10 @@ defm ORRvvv : NeonI_3VSame_B_sizes<0b0, 0b10, 0b00011, "orr", or, or, 1>; // Vector Move - register // Alias for ORR if Vn=Vm. -// FIXME: This is actually the preferred syntax but TableGen can't deal with -// custom printing of aliases. def : NeonInstAlias<"mov $Rd.8b, $Rn.8b", - (ORRvvv_8B VPR64:$Rd, VPR64:$Rn, VPR64:$Rn), 0>; + (ORRvvv_8B VPR64:$Rd, VPR64:$Rn, VPR64:$Rn)>; def : NeonInstAlias<"mov $Rd.16b, $Rn.16b", - (ORRvvv_16B VPR128:$Rd, VPR128:$Rn, VPR128:$Rn), 0>; + (ORRvvv_16B VPR128:$Rd, VPR128:$Rn, VPR128:$Rn)>; // The MOVI instruction takes two immediate operands. The first is the // immediate encoding, while the second is the cmode. A cmode of 14, or -- cgit v1.2.3