From 70939ee1415722d7f39f13faf9b3644b96007996 Mon Sep 17 00:00:00 2001 From: Jim Grosbach Date: Wed, 17 Aug 2011 21:51:27 +0000 Subject: ARM clean up the imm_sr operand class representation. Represent the operand value as it will be encoded in the instruction. This allows removing the specialized encoder and decoder methods entirely. Add an assembler match class while we're at it to lay groundwork for parsing the thumb shift instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137879 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/ARM/ARMCodeEmitter.cpp | 2 -- 1 file changed, 2 deletions(-) (limited to 'lib/Target/ARM/ARMCodeEmitter.cpp') diff --git a/lib/Target/ARM/ARMCodeEmitter.cpp b/lib/Target/ARM/ARMCodeEmitter.cpp index c30aa37454..7d4eb6f18f 100644 --- a/lib/Target/ARM/ARMCodeEmitter.cpp +++ b/lib/Target/ARM/ARMCodeEmitter.cpp @@ -236,8 +236,6 @@ namespace { const {return 0; } uint32_t getLdStSORegOpValue(const MachineInstr &MI, unsigned OpIdx) const { return 0; } - unsigned getThumbSRImmOpValue(const MachineInstr &MI, unsigned OpIdx) - const { return 0; } unsigned getAddrModeImm12OpValue(const MachineInstr &MI, unsigned Op) const { -- cgit v1.2.3