From 564fbf6aff8fb95646a1290078a37c2d4dbe629f Mon Sep 17 00:00:00 2001 From: Bob Wilson Date: Mon, 2 Jul 2012 19:48:31 +0000 Subject: Add all codegen passes to the PassManager via TargetPassConfig. This is a preliminary step toward having TargetPassConfig be able to start and stop the compilation at specified passes for unit testing and debugging. No functionality change. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159567 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/Hexagon/HexagonTargetMachine.cpp | 20 ++++++++++---------- 1 file changed, 10 insertions(+), 10 deletions(-) (limited to 'lib/Target/Hexagon/HexagonTargetMachine.cpp') diff --git a/lib/Target/Hexagon/HexagonTargetMachine.cpp b/lib/Target/Hexagon/HexagonTargetMachine.cpp index 7de27f74e2..8572654a9f 100644 --- a/lib/Target/Hexagon/HexagonTargetMachine.cpp +++ b/lib/Target/Hexagon/HexagonTargetMachine.cpp @@ -102,22 +102,22 @@ TargetPassConfig *HexagonTargetMachine::createPassConfig(PassManagerBase &PM) { } bool HexagonPassConfig::addInstSelector() { - PM->add(createHexagonRemoveExtendOps(getHexagonTargetMachine())); - PM->add(createHexagonISelDag(getHexagonTargetMachine())); - PM->add(createHexagonPeephole()); + addPass(createHexagonRemoveExtendOps(getHexagonTargetMachine())); + addPass(createHexagonISelDag(getHexagonTargetMachine())); + addPass(createHexagonPeephole()); return false; } bool HexagonPassConfig::addPreRegAlloc() { if (!DisableHardwareLoops) { - PM->add(createHexagonHardwareLoops()); + addPass(createHexagonHardwareLoops()); } return false; } bool HexagonPassConfig::addPostRegAlloc() { - PM->add(createHexagonCFGOptimizer(getHexagonTargetMachine())); + addPass(createHexagonCFGOptimizer(getHexagonTargetMachine())); return true; } @@ -130,19 +130,19 @@ bool HexagonPassConfig::addPreSched2() { bool HexagonPassConfig::addPreEmitPass() { if (!DisableHardwareLoops) { - PM->add(createHexagonFixupHwLoops()); + addPass(createHexagonFixupHwLoops()); } - PM->add(createHexagonNewValueJump()); + addPass(createHexagonNewValueJump()); // Expand Spill code for predicate registers. - PM->add(createHexagonExpandPredSpillCode(getHexagonTargetMachine())); + addPass(createHexagonExpandPredSpillCode(getHexagonTargetMachine())); // Split up TFRcondsets into conditional transfers. - PM->add(createHexagonSplitTFRCondSets(getHexagonTargetMachine())); + addPass(createHexagonSplitTFRCondSets(getHexagonTargetMachine())); // Create Packets. - PM->add(createHexagonPacketizer()); + addPass(createHexagonPacketizer()); return false; } -- cgit v1.2.3