From 47b33528d1b4298bf8cc5dcca8b531dfd0e704bb Mon Sep 17 00:00:00 2001 From: Zoran Jovanovic Date: Sat, 14 Sep 2013 06:49:25 +0000 Subject: Support for misc microMIPS instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190744 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/Mips/MicroMipsInstrInfo.td | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) (limited to 'lib/Target/Mips/MicroMipsInstrInfo.td') diff --git a/lib/Target/Mips/MicroMipsInstrInfo.td b/lib/Target/Mips/MicroMipsInstrInfo.td index eaf2f31c3b..b274d6fa00 100644 --- a/lib/Target/Mips/MicroMipsInstrInfo.td +++ b/lib/Target/Mips/MicroMipsInstrInfo.td @@ -135,4 +135,20 @@ let DecoderNamespace = "MicroMips", Predicates = [InMicroMips] in { def MADDU_MM : MMRel, MArithR<"maddu", 1>, MULT_FM_MM<0x36c>; def MSUB_MM : MMRel, MArithR<"msub">, MULT_FM_MM<0x3ac>; def MSUBU_MM : MMRel, MArithR<"msubu">, MULT_FM_MM<0x3ec>; + + /// Count Leading + def CLZ_MM : MMRel, CountLeading0<"clz", GPR32Opnd>, CLO_FM_MM<0x16c>; + def CLO_MM : MMRel, CountLeading1<"clo", GPR32Opnd>, CLO_FM_MM<0x12c>; + + /// Sign Ext In Register Instructions. + def SEB_MM : MMRel, SignExtInReg<"seb", i8, GPR32Opnd>, SEB_FM_MM<0x0ac>; + def SEH_MM : MMRel, SignExtInReg<"seh", i16, GPR32Opnd>, SEB_FM_MM<0x0ec>; + + /// Word Swap Bytes Within Halfwords + def WSBH_MM : MMRel, SubwordSwap<"wsbh", GPR32Opnd>, SEB_FM_MM<0x1ec>; + + def EXT_MM : MMRel, ExtBase<"ext", GPR32Opnd, uimm5, MipsExt>, + EXT_FM_MM<0x2c>; + def INS_MM : MMRel, InsBase<"ins", GPR32Opnd, uimm5, MipsIns>, + EXT_FM_MM<0x0c>; } -- cgit v1.2.3