From 159e7f40956437a2513f54e19b03772bd3a0e942 Mon Sep 17 00:00:00 2001 From: Hal Finkel Date: Wed, 26 Mar 2014 12:49:28 +0000 Subject: [PowerPC] Lower VSELECT using xxsel when VSX is available With VSX there is a real vector select instruction, and so we should use it. Note that VSELECT will still scalarize for v2f64 because the corresponding SetCC result type (v2i64) is not currently a legal type. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204801 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/PowerPC/PPCISelDAGToDAG.cpp | 19 ++++++++++++++++--- 1 file changed, 16 insertions(+), 3 deletions(-) (limited to 'lib/Target/PowerPC/PPCISelDAGToDAG.cpp') diff --git a/lib/Target/PowerPC/PPCISelDAGToDAG.cpp b/lib/Target/PowerPC/PPCISelDAGToDAG.cpp index 5b09588e0f..c3f36756f6 100644 --- a/lib/Target/PowerPC/PPCISelDAGToDAG.cpp +++ b/lib/Target/PowerPC/PPCISelDAGToDAG.cpp @@ -831,7 +831,9 @@ SDNode *PPCDAGToDAGISel::SelectSETCC(SDNode *N) { case ISD::SETONE: case ISD::SETUNE: { SDValue VCmp(CurDAG->getMachineNode(VCmpInst, dl, VecVT, LHS, RHS), 0); - return CurDAG->SelectNodeTo(N, PPC::VNOR, VecVT, VCmp, VCmp); + return CurDAG->SelectNodeTo(N, PPCSubTarget.hasVSX() ? PPC::XXLNOR : + PPC::VNOR, + VecVT, VCmp, VCmp); } case ISD::SETLT: case ISD::SETOLT: @@ -853,7 +855,9 @@ SDNode *PPCDAGToDAGISel::SelectSETCC(SDNode *N) { SDValue VCmpGT(CurDAG->getMachineNode(VCmpInst, dl, VecVT, LHS, RHS), 0); unsigned int VCmpEQInst = getVCmpEQInst(VT, PPCSubTarget.hasVSX()); SDValue VCmpEQ(CurDAG->getMachineNode(VCmpEQInst, dl, VecVT, LHS, RHS), 0); - return CurDAG->SelectNodeTo(N, PPC::VOR, VecVT, VCmpGT, VCmpEQ); + return CurDAG->SelectNodeTo(N, PPCSubTarget.hasVSX() ? PPC::XXLOR : + PPC::VOR, + VecVT, VCmpGT, VCmpEQ); } } case ISD::SETLE: @@ -862,7 +866,9 @@ SDNode *PPCDAGToDAGISel::SelectSETCC(SDNode *N) { SDValue VCmpLE(CurDAG->getMachineNode(VCmpInst, dl, VecVT, RHS, LHS), 0); unsigned int VCmpEQInst = getVCmpEQInst(VT, PPCSubTarget.hasVSX()); SDValue VCmpEQ(CurDAG->getMachineNode(VCmpEQInst, dl, VecVT, LHS, RHS), 0); - return CurDAG->SelectNodeTo(N, PPC::VOR, VecVT, VCmpLE, VCmpEQ); + return CurDAG->SelectNodeTo(N, PPCSubTarget.hasVSX() ? PPC::XXLOR : + PPC::VOR, + VecVT, VCmpLE, VCmpEQ); } default: llvm_unreachable("Invalid vector compare type: should be expanded by legalize"); @@ -1323,6 +1329,13 @@ SDNode *PPCDAGToDAGISel::Select(SDNode *N) { getI32Imm(BROpc) }; return CurDAG->SelectNodeTo(N, SelectCCOp, N->getValueType(0), Ops, 4); } + case ISD::VSELECT: + if (PPCSubTarget.hasVSX()) { + SDValue Ops[] = { N->getOperand(2), N->getOperand(1), N->getOperand(0) }; + return CurDAG->SelectNodeTo(N, PPC::XXSEL, N->getValueType(0), Ops, 3); + } + + break; case PPCISD::BDNZ: case PPCISD::BDZ: { bool IsPPC64 = PPCSubTarget.isPPC64(); -- cgit v1.2.3